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mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.1 overview the mn103lf series of 32-bit single-chip microcomputers have multiple types of peripheral functions. this lsi series is well suited for camera, tv, vcr, car audio, printer, telephone, fax machine, air-conditioner, music instrument and other applications. this lsi series has flexible and optimized hardware config urations and simple efficient instruction set. this lsi series incorporates an internal rom of 1048 kb (maximum) and ram of 76 kb (maximum), 11 external interrupts, 96 internal interrupts incl uding non-maskable interrupt, 26 timer co unters, 14 sets of serial interfaces, a/d converter, d/a converter, 2 sets of watc hdog timer, dma, can, and iebus interface. in addition, this lsi series has 5 oscillation circuits (e xternal high frequency: 4 mhz to 20 mhz/ external low fre- quency:32.768 khz/ internal high frequency: 20 mhz/ internal low frequency: 30 khz/ pll: frequency multiplier of high or low frequency). the internal clock can be switched to four oscillation cl ock except the internal low os cillation. the internal clock is generated by dividing the oscillation clock or pll clock. the best operation clock for the system can be selected by switching its frequency ratio by programming. a machine cycle (minimum instruction execution time) is 25 ns (internal operating condition: 1.8 v, 40 mhz). downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.2 product summary this manual describes the following model. series *1 model pin number rom size ram size *2 sector swap *3 in-vehicle lan package mn103l32 mn103lf32r * 100 pin 1048 kb 76 kb - can/iebus 100 pin lqfp (14 mm ? 14 mm/0.5mm pitch) mn103lf32q * 792 kb mn103lf32n * 536 kb 40 kb mn103lf32m * 408 kb 32 kb mn103lf32k * 280 kb 20 kb mn103lf32z * 1048 kb 76 kb existence mn103lf32y * 792 kb mn103lf32x * 536 kb 40 kb mn103lf32w * 408 kb 32 kb mn103lf32t * 280 kb 20 kb mn103l33 mn103lf33r * 128 pin 1048 kb 76 kb - 128 pin lqfp (18 mm ? 18 mm/0.5mm pitch) mn103lf33q * 792 kb mn103lf33n * 536 kb 40 kb mn103lf33m * 408 kb 32 kb mn103lf33k * 280 kb 20 kb mn103lf33z * 1048 kb 76 kb existence mn103lf33y * 792 kb mn103lf33x * 536 kb 40 kb mn103lf33w * 408 kb 32 kb mn103lf33t * 280 kb 20 kb mn103l09 mn103lf09r * 144 pin 1048 kb 76 kb - 144 pin lqfp (20 mm ? 20 mm/0.5mm pitch) mn103lf09q * 792 kb mn103lf09n * 536 kb 40 kb mn103lf09m * 408 kb 32 kb mn103lf09k * 280 kb 20 kb mn103lf09z * 1048 kb 76 kb existence mn103lf09y * 792 kb mn103lf09x * 536 kb 40 kb mn103lf09w * 408 kb 32 kb mn103lf09t * 280 kb 20 kb downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e mn103l10/ mn103l13 mn103lf13r * 100 pin 1048 kb 76 kb - iebus 100 pinlqfp (14 mm ? 14 mm/0.5mm pitch) mn103lf13q * 792 kb mn103lf10r * 1048 kb 64 kb mn103lf10q * 792 kb mn103lf10n * 536 kb 40 kb mn103lf10m * 408 kb 32 kb mn103lf10k 280 kb 20 kb mn103lf13z * 1048 kb 76 kb existence mn103lf13y * 792 kb mn103lf10z * 1048 kb 64 kb mn103lf10y * 792 kb mn103lf10x * 536 kb 40 kb mn103lf10w * 408 kb 32 kb mn103lf10t * 280 kb 20 kb mn103l11/ mn103l14 mn103lf14r 128 pin 1048 kb 76 kb - 128 pinlqfp (18mm ? 18 mm/0.5mm pitch) mn103lf14q * 792 kb mn103lf11r * 1048 kb 64 kb mn103lf11q * 792 kb mn103lf11n * 536 kb 40 kb mn103lf11m * 408 kb 32 kb mn103lf11k * 280 kb 20 kb mn103lf14z * 1048 kb 76 kb existence mn103lf14y * 792 kb mn103lf11z * 1048 kb 64 kb mn103lf11y * 792 kb mn103lf11x * 536 kb 40 kb mn103lf11w * 408 kb 32 kb mn103lf11t * 280 kb 20 kb mn103l12/ mn103l15 mn103lf15r 144 pin 1048 kb 76 kb - 144 pinlqfp (20mm ? 20 mm/0.5mm pitch) mn103lf15q * 792 kb mn103lf12r * 1048 kb 64 kb mn103lf12q * 792 kb mn103lf12n 536 kb 40 kb mn103lf15z * 1048 kb 76 kb existence mn103lf15y * 792 kb mn103lf12z * 1048 kb 64 kb mn103lf12y * 792 kb mn103lf12x * 536 kb 40 kb series *1 model pin number rom size ram size *2 sector swap *3 in-vehicle lan package downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e mn103l16/ mn103l19 mn103lf19r 100 pin 1048 kb 76 kb - - 100 pinlqfp (14mm ? 14 mm/0.5mm pitch) mn103lf19q * 792 kb mn103lf16r 1048 kb 64 kb mn103lf16q 792 kb mn103lf16n * 536 kb 40 kb 100 pinlqfp (14mm ? 14 mm/0.5mm pitch) 100 pinqfp (18mm ? 18mm/0.65mm pitch) mn103lf16m * 408 kb 32 kb mn103lf16k 280 kb 20 kb mn103lf19z * 1048 kb 76 kb existence 100 pinlqfp (14mm ? 14 mm/0.5mm pitch) mn103lf19y * 792 kb mn103lf16z * 1048 kb 64 kb mn103lf16y * 792 kb mn103lf16x * 536 kb 40 kb 100 pinlqfp (14mm ? 14 mm/0.5mm pitch) 100 pinqfp (18mm ? 18mm/0.65mm pitch) mn103lf16w * 408 kb 32 kb mn103lf16t * 280 kb 20 kb mn103l17/ mn103l20 mn103lf20r 128 pin 1048 kb 76 kb - 128 pinlqfp (18mm ? 18 mm/0.5mm pitch) mn103lf20q * 792 kb mn103lf17r * 1048 kb 64 kb mn103lf17q * 792 kb mn103lf17n * 536 kb 40 kb mn103lf17m * 408 kb 32 kb mn103lf17k 280 kb 20 kb mn103lf20z * 1048 kb 76 kb existence mn103lf20y * 792 kb mn103lf17z * 1048 kb 64 kb mn103lf17y * 792 kb mn103lf17x * 536 kb 40 kb mn103lf17w * 408 kb 32 kb mn103lf17t * 280 kb 20 kb mn103l18/ mn103l21 mn103lf21r * 144 pin 1048 kb 76 kb - 144 pinlqfp (20mm ? 20 mm/0.5mm pitch) mn103lf21q * 792 kb mn103lf18r * 1048 kb 64 kb mn103lf18q * 792 kb mn103lf18n * 536 kb 40 kb mn103lf21z * 1048 kb 76 kb existence mn103lf21y * 792 kb mn103lf18z * 1048 kb 64 kb mn103lf18y * 792 kb mn103lf18x * 536 kb 40 kb series *1 model pin number rom size ram size *2 sector swap *3 in-vehicle lan package downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e mn103l22/ mn103l25 mn103lf25r * 100 pin 1048 kb 76 kb - can 100 pinlqfp (14mm ? 14 mm/0.5mm pitch) mn103lf25q * 792 kb mn103lf22r * 1048 kb 64 kb mn103lf22q * 792 kb mn103lf22n 536 kb 40 kb mn103lf22m * 408 kb 32 kb mn103lf22k 280 kb 20 kb mn103lf25z * 1048 kb 76 kb existence mn103lf25y * 792 kb mn103lf22z * 1048 kb 64 kb mn103lf22y * 792 kb mn103lf22x * 536 kb 40 kb mn103lf22w * 408 kb 32 kb mn103lf22t * 280 kb 20 kb mn103l23/ mn103l26 mn103lf26r * 128 pin 1048 kb 76 kb - 128 pinlqfp (18mm ? 18 mm/0.5mm pitch) mn103lf26q * 792 kb mn103lf23r * 1048 kb 64 kb mn103lf23q * 792 kb mn103lf23n * 536 kb 40 kb mn103lf23m * 408 kb 32 kb mn103lf23k * 280 kb 20 kb mn103lf26z * 1048 kb 76 kb existence mn103lf26y * 792 kb mn103lf23z * 1048 kb 64 kb mn103lf23y * 792 kb mn103lf23x * 536 kb 40 kb mn103lf23w * 408 kb 32 kb mn103lf23t * 280 kb 20 kb mn103l24/ mn103l27 mn103lf27r * 144 pin 1048 kb 76 kb - 144 pinlqfp (20mm ? 20 mm/0.5mm pitch) mn103lf27q * 792 kb mn103lf24r * 1048 kb 64 kb mn103lf24q * 792 kb mn103lf24n * 536 kb 40 kb mn103lf27z * 1048 kb 76 kb existence mn103lf27y * 792 kb mn103lf24z * 1048 kb 64 kb mn103lf24y * 792 kb mn103lf24x * 536 kb 40 kb series *1 model pin number rom size ram size *2 sector swap *3 in-vehicle lan package downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e mn103lb8/ mn103lc2 mn103lfc2r * 100 pin 1048kb 76kb - can/iebus 100 pinlqfp (14mm ? 14 mm/0.5mm pitch) mn103lfc2q * 792kb mn103lfb8n * 536kb 40kb mn103lfb8m * 408kb 32kb mn103lfb8k * 280kb 20kb mn103lfc2z * 1048kb 76kb existence mn103lfc2y * 792kb mn103lfb8x * 536kb 40kb mn103lfb8w * 408kb 32kb mn103lfb8t * 280kb 20kb mn103lb9/ mn103lc3 mn103lfc3r * 128 pin 1048kb 76kb - 128 pinlqfp (18mm ? 18 mm/0.5mm pitch) mn103lfc3q * 792kb mn103lfb9n * 536kb 40kb mn103lfb9m * 408kb 32kb mn103lfb9k * 280kb 20kb mn103lfc3z * 1048kb 76kb existence mn103lfc3y * 792kb mn103lfb9x * 536kb 40kb mn103lfb9w * 408kb 32kb mn103lfb9t * 280kb 20kb mn103l99/ mn103lc0 mn103lf99r * 144 pin 1048kb 76kb - 144 pinlqfp (20mm ? 20 mm/0.5mm pitch) mn103lf99q * 792kb mn103lfc0n * 536kb 40kb mn103lfc0m * 408kb 32kb mn103lfc0k * 280kb 20kb mn103lf99z * 1048kb 76kb existence mn103lf99y * 792kb mn103lfc0x * 536kb 40kb mn103lfc0w * 408kb 32kb mn103lfc0t * 280kb 20kb series *1 model pin number rom size ram size *2 sector swap *3 in-vehicle lan package downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e mn103la0/ mn103la3 mn103lfa3r * 100 pin 1048kb 76kb - iebus 100 pinlqfp (14mm ? 14 mm/0.5mm pitch) mn103lfa3q * 792kb mn103lfa0r * 1048kb 64kb mn103lfa0q * 792kb mn103lfa0n * 536kb 40kb mn103lfa0m * 408kb 32kb mn103lfa0k * 280kb 20kb mn103lfa3z * 1048kb 76kb existence mn103lfa3y * 792kb mn103lfa0z * 1048kb 64kb mn103lfa0y * 792kb mn103lfa0x * 536kb 40kb mn103lfa0w * 408kb 32kb mn103lfa0t * 280kb 20kb mn103la1/ mn103la4 mn103lfa4r * 128 pin 1048kb 76kb - 128 pinlqfp (18mm ? 18 mm/0.5mm pitch) mn103lfa4q * 792kb mn103lfa1r * 1048kb 64kb mn103lfa1q * 792kb mn103lfa1n * 536kb 40kb mn103lfa1m * 408kb 32kb mn103lfa1k * 280kb 20kb mn103lfa4z * 1048kb 76kb existence mn103lfa4y * 792kb mn103lfa1z * 1048kb 64kb mn103lfa1y * 792kb mn103lfa1x * 536kb 40kb mn103lfa1w * 408kb 32kb mn103lfa1t * 280kb 20kb mn103la2/ mn103la5 mn103lfa5r * 144 pin 1048kb 76kb - 144 pinlqfp (20mm ? 20 mm/0.5mm pitch) mn103lfa5q * 792kb mn103lfa2r * 1048kb 64kb mn103lfa2q * 792kb mn103lfa2n * 536kb 40kb mn103lfa5z * 1048kb 76kb existence mn103lfa5y * 792kb mn103lfa2z * 1048kb 64kb mn103lfa2y * 792kb mn103lfa2x * 536kb 40kb series *1 model pin number rom size ram size *2 sector swap *3 in-vehicle lan package downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e mn103la6/ mn103la9 mn103lfa9r * 100 pin 1048kb 76kb - - 100 pinlqfp (14mm ? 14 mm/0.5mm pitch) mn103lfa9q * 792kb mn103lfa6r * 1048kb 64kb mn103lfa6q * 792kb mn103lfa6n * 536kb 40kb mn103lfa6m * 408kb 32kb mn103lfa6k * 280kb 20kb mn103lfa9z * 1048kb 76kb existence mn103lfa9y * 792kb mn103lfa6z * 1048kb 64kb mn103lfa6y * 792kb mn103lfa6x * 536kb 40kb mn103lfa6w * 408kb 32kb mn103lfa6t * 280kb 20kb mn103la7/ mn103lb0 mn103lfb0r * 128 pin 1048kb 76kb - 128 pinlqfp (18mm ? 18 mm/0.5mm pitch) mn103lfb0q * 792kb mn103lfa7r * 1048kb 64kb mn103lfa7q * 792kb mn103lfa7n * 536kb 40kb mn103lfa7m * 408kb 32kb mn103lfa7k * 280kb 20kb mn103lfb0z * 1048kb 76kb existence mn103lfb0y * 792kb mn103lfa7z * 1048kb 64kb mn103lfa7y * 792kb mn103lfa7x * 536kb 40kb mn103lfa7w * 408kb 32kb mn103lfa7t * 280kb 20kb mn103la8/ mn103lb1 mn103lfb1r * 144 pin 1048kb 76kb - 144 pinlqfp (20mm ? 20 mm/0.5mm pitch) mn103lfb1q * 792kb MN103LFA8R * 1048kb 64kb mn103lfa8q * 792kb mn103lfa8n * 536kb 40kb mn103lfb1z * 1048kb 76kb existence mn103lfb1y * 792kb mn103lfa8z * 1048kb 64kb mn103lfa8y * 792kb mn103lfa8x * 536kb 40kb series *1 model pin number rom size ram size *2 sector swap *3 in-vehicle lan package downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e .. there are the notes at dma forced end that need to be applied only to mn103lf09/10/11/12/ 13/14/15/16/17/18/19/20/21/22/23 /24/25/26/27/32/33 series. the notes do not need to apply in mn103lf99/a0/a1/a2/a3/a4/a5/a6/a7/a8 /a9/b0/b1/b2/b3/b4/b 5/b6/b7/b8/b9/c0/c2/ c3 series. refer to [chapter dma controlle r] of lsi user?s manual about the notes. .. mn103lb2/ mn103lb5 mn103lfb5r * 100 pin 1048kb 76kb - can 100 pinlqfp (14mm ? 14 mm/0.5mm pitch) mn103lfb5q * 792kb mn103lfb2r * 1048kb 64kb mn103lfb2q * 792kb mn103lfb2n * 536kb 40kb mn103lfb2m * 408kb 32kb mn103lfb2k * 280kb 20kb mn103lfb5z * 1048kb 76kb existence mn103lfb5y * 792kb mn103lfb2z * 1048kb 64kb mn103lfb2y * 792kb mn103lfb2x * 536kb 40kb mn103lfb2w * 408kb 32kb mn103lfb2t * 280kb 20kb mn103lb3/ mn103lb6 mn103lfb6r * 128 pin 1048kb 76kb - 128 pinlqfp (18mm ? 18 mm/0.5mm pitch) mn103lfb6q * 792kb mn103lfb3r * 1048kb 64kb mn103lfb3q * 792kb mn103lfb3n * 536kb 40kb mn103lfb3m * 408kb 32kb mn103lfb3k * 280kb 20kb mn103lfb6z * 1048kb 76kb existence mn103lfb6y * 792kb mn103lfb3z * 1048kb 64kb mn103lfb3y * 792kb mn103lfb3x * 536kb 40kb mn103lfb3w * 408kb 32kb mn103lfb3t * 280kb 20kb mn103lb4/ mn103lb7 mn103lfb7r * 144 pin 1048kb 76kb - 144 pinlqfp (20mm ? 20 mm/0.5mm pitch) mn103lfb7q * 792kb mn103lfb4r * 1048kb 64kb mn103lfb4q * 792kb mn103lfb4n * 536kb 40kb mn103lfb7z * 1048kb 76kb existence mn103lfb7y * 792kb mn103lfb4z * 1048kb 64kb mn103lfb4y * 792kb mn103lfb4x * 536kb 40kb *1 refer to [chapter appendix] of lsi user?s manual. *2 when using on-chip debug function, the debugger take over 500 byte in size *3 refer to [chapter internal flash me mory] of lsi user?s manul for details. * under development series *1 model pin number rom size ram size *2 sector swap *3 in-vehicle lan package downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.3 hardware functions cpu core mn103l core (the instruction se t is compatible mn103s series) memory space 4 gb (ins truct/data common use) load-store architectur e (3-stage pipeline) machine cycle high-speed mode 25 ns/ 40 mhz (max) low-speed mode 30.3 ? s/ 33 khz (max) operation mode normal mode (cpu clock operation, peripheral circuit clock operation mode) slow mode (cpu clock operation, peripheral circuit clock operation mode) halt mode (cpu clock stop, peripheral circuit clock operation mode) stop mode (all clocks stop mode) clock oscillation circuit : 5 circuits external high-speed oscillation (clkosc) : crystal oscillator/ ceramic oscillator : 4 mhz to 20 mhz external low-speed oscillation (clkx) : crystal oscillator/ ceramic oscillator : 32.768 khz internal high-speed oscillation (clkrc) : 20 mhz internal low-speed oscillation (clkrcx) : 30 khz pll output (clkpll) : 60 mhz to 120 mhz clock multiple circuit (pll) multiplication rate: 4, 6, 8, 10, 12, 16, 20 multiplied clock of clkoscsel 2440 to 3660 multiplied clock of clkx clock dividing 2, 3 divided of clkpll pll output dividing clock: 20 mhz to 40 mhz (clkplldiv) downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e internal operation clock : 6 types cpu clock (clkcpu) frequency : 40 mhz (max) clock source : clkplldiv , clkosc, clkrc, clkx clock dividing : 1, 2, 4, 8, 16, 32, 64 divided of clock source peripheral bus clock (clkbus) frequency : 20 mhz (max) clock source : clkplldiv , clkosc, clkrc, clkx clock dividing : 2, 4, 8, 16, 32, 64, 128 divided of clock source (this setting is independent from the dividing clock setting of clkcpu. set the frequency of clkbus to less than clkcpu.) peripheral high-speed clock (clksp) frequency : 22 mhz (max) clock source : clkrc, clkosc, clkplldiv clock dividing : 1, 2, 4, 8, 16 divided of clock source high-speed oscillation clock (clkoscsel) frequency : 22 mhz (max) clock source : clkrc, clkosc internal low-speed oscillation clock (clkrcx) frequency : 33 khz (max) low-speed oscillation clock (clksx) frequency : 33 khz (max) clock source : clkrcx, clkxsel external bus interface bus area : 2 mb ? 2 banks data bus : 8/ 16 bits downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e dma controller transfer area : internal rom space / internal ram space / internal i/o area / external memory space ? internal rom space / internal ram space / in ternal i/o area / external memory space channel : 4 ch transfer form : 2 bus cycles transfer transfer requests mn103lf09/32/33/99/b8/b9/c0/c2/c3 series: 75 types (external interrupts:4, timer: 30, serial i/f:33, iic: 3, a/d converter:1, can controller:1, iebus controller:2, software:1) mn103lf10/11/12/13/14/15/a0/a1/a2/a3/a4/a5 series: 74 types (external interrupts:4, timer: 30, serial i/f:33, iic: 3, a/d converter:1, iebus controller:2, software:1) mn103lf22/23/24/25/26/27/b2/b3/b4/b5/b6/b7 series: 73 types (external interrupts:4, timer: 30, serial i/f:33, iic: 3, a/d converter:1, can controller:1, software:1) mn103lf16/17/18/19/20/21/a6/a7/a8/a9/b0/b1 series: 72 types (external interrupts:4, timer: 30, serial i/f:33, iic: 3, a/d converter:1, software:1) transfer modes: 3 modes (one word transfer / burst transfer / intermittent transfer) interrupt functions internal interrupts mn103lf09/32/33/99/b8/b9/c0/c2/c3 series: 97 factors (timer:46, serial i/f:22, iic:6, watchdog timer:1, dma:12, a/d converter:1, can controller: 1, lin controller: 1, iebus controller: 4, power voltage detection: 2, system error:1) mn103lf10/11/12/13/14/15/a0/a1/a2/a3/a4/a5 series: 96 factors (timer:46, serial i/f:22, iic:6, watchdog timer:1, dma:12, a/d converter:1, lin controller: 1, iebus controller: 4, power voltage detection: 2, system error:1) mn103lf22/23/24/25/26/27/b2/b3/b4/b5/b6/b7 series: 93 factors (timer:46, serial i/f:22, iic:6, watchdog timer:1, dma:12, a/d converter:1, can controller: 1, lin controller: 1, power voltage detection: 2, system error:1) mn103lf16/17/18/19/20/21/a6/a7/a8/a9/b0/b1 series: 92 factors (timer:46, serial i/f:22, iic:6, watchdog timer:1, dma:12, a/d converter:1, lin controller: 1, power voltage detection: 2, system error:1) external interrupts: 11 factor (irqn pin(n=0 to 8) :9, nmirq pin(sharing pi n with irq7 as an interrupt factors) :1, key input:1) downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e watchdog timer watchdog timer on detection of error, hardware reset is done inside the lsi (non-maskable interrupt is generated by the first watchdog time-out event, and hardware reset is done by a series of two time-out events) time-out cycle : cpu clock cycle ? n ( n = 2 16 , 2 18 , 2 20 , 2 27 ) watchdog timer2 on detection of error, hardware reset is done inside the lsi (non-maskable interrupt is generated by the first watchdog time-out event, and hardware reset is done by a series of two time-out events) time-out cycle : inte rnal low-speed oscillation clock cycle ? n (n = 2 4 , 2 5 , 2 6 , 2 7 , 2 8 , 2 9 , 2 10 , 2 11 , 2 12 , 2 13 , 2 14 , 2 15 ) timer counter : 26 units 8-bit timer : 8 units 8-bit simple timer : 5 units 8-bit free-running timer : 1 unit 16-bit timer : 10 units motor control 16-bit timer : 1 unit 24h 8-bit timer : 1 unit timer 0 (8-bit timer) timer count (up count), external event count, timer pulse output, pwm output (cycle is fixed), compare register with double buffer clock source : clksp, clksp/4, clks p/16, clksp/32, clksp/64, clksp/128, clkbus/2, clkbus/4, clkbus/8, clksx, external clock timer 1 (8-bit timer) timer count (up count), external event count, timer pulse output, 16-bit cascade connection (to timer 0), compare register with double buffer clock source : clksp, clksp/4, clks p/16, clksp/32, clksp/64, clksp/128, clkbus/2, clkbus/4, clkbus/8, clksx, external clock timer 2 (8-bit timer) timer count (up count), external event count, timer pulse output, pwm output (cycle is fixed), 24-bit cascade connection (to timer 0, timer 1), compare register with double buffer clock source : clksp, clksp/4, clksp/16, clksp/32, clksp/64, clksp/128, clkbus/2, clkbus/4, clkbus/8, clksx, external clock downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e timer 3 (8-bit timer) timer count (up count), external event count, timer pulse output, 16-bit cascade connection (to timer 2), 32-bit cascade connection (to ti mer 0, timer 1, timer 2), compare register with double buffer clock source : clksp, clksp/4, clks p/16, clksp/32, clksp/64, clksp/128, clkbus/2, clkbus/4, clkbus/8, clksx, external clock timer 4 (8-bit timer) timer count (up count), external event count, timer pulse output, pwm output (cycle is fixed) clock source : clksp, clksp/4, clks p/16, clksp/32, clksp/64, clksp/128, clkbus/2, clkbus/4, clkbus/8, clksx, external clock timer 20 (8-bit timer) timer count (up count), external event count, timer pulse output, pwm output (cycle is fixed) clock source : clksp, clksp/4, clksp/16, clksp/32, clksp/64, clkbus/2, clkbus/4, clksx, external clock timer 21 (8-bit timer) timer count (up count), timer pulse output, timer output for vfd clock source : clkbus/2, clkbus/4, clkbus/16, clkbus/32, clkbus/64, clkbus/128 timer 22 (8-bit timer) timer count (up count), external event count, timer pulse output, pwm output (cycle is fixed) clock source : clksp, clksp/4, clksp/16, clksp/32, clksp/64, clkbus/2, clkbus/4, clksx, external clock timer 6 (8-bit free-running timer) clock source : clksp, clkbus, clksx, clksp/2 12 , clksp/2 13 , clksx/2 12 , clksx/2 13 timer 7 (16-bit timer) timer count (up count), external event count, timer pulse output, pwm output (cycle/duty continuous changeable), input capture (1 system) clock source : clksp, clksp/2, clksp/4, clksp/16, clkbus/2, clkbus/4, cl kbus/16, external clock timer 8, 9, 10, 11, 12, 13, 14, 15, 16 (16-bit timer) timer count (up count, down count), external event count, timer pulse output, pwm output (cycle/duty continuous changeable), input capture (2 system), 2 phases encoder clock source : clkbus, clkbus/8, timer 0 or 1 compare match cycle, external clock downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e timer m (motor control 16-bit timer) timer pulse output, ex ternal event count, complementary 3 phases pwm output (triangular wave and saw-tooth wave output, dead time insertion), 4 phases pwm output, output control by external interrupt (hi-z output or output data is fixed) clock source: clksp, clkbus, external clock divided by 1, 2, 4 or 16 timer a, b, c, d, e (8-bit simple timer) serial transfer base clock generation clock source : clksp, clksp/2, clks p/4, clksp/8, clksp/16, clksp/32, clkbus/2, clkbus/4 24h timer alarm function, interval function clock source : clksx, clksp (only when cpu stop) serial interface : 14 channels uart/ clock synchronous : 11 channels iic : 3 channels serial 0 (uart / clock synchronous / lin) - uart parity check, overrun erro r/frame error detection, transfer size can be selected from 7 to 8 bits. - clock synchronous the communication type can be selected from 2-ware or 3-wire. first tansfer bit can be selected from msb or lsb. arbitrary size of 2 to 8 bits are selectable. continuous transmission, continuous reception, continuous transmission/ reception are available. synchronous edge selection of transfer clock. maximum transfer rate: 3.3 mbps - lin operate in conjunction with timer 0, 7 and 8. master communication. synch break field transm ission, check sum arithmetic slave communication wake-up reception, synch break field recepti on, synch field reception , check sum arithmetic error detection check sum error, bit error clock source: baud rate timer b0 output, external clock downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e serial 1, 2, 3, 4, 9, 10 (uart / clock synchronous) - uart parity check, overrun erro r/frame error detection, transfer size can be selected from 7 to 8 bits. - clock synchronous the communication type can be selected from 2-ware or 3-wire. first tansfer bit can be selected from msb or lsb. arbitrary size of 2 to 8 bits are selectable. continuous transmission, continuous reception, continuous transmission/ reception are available. synchronous edge selection of transfer clock. maximum transfer rate: 3.3 mbps clock source: baud rate timer bn output (n=1 to 4, 9, 10), external clock serial 5, 6, 7, 8 (uart / clock synchronous) - uart parity check, overrun erro r/frame error detection. transfer size can be selected from 7 to 8 bits. - clock synchronous the communication type can be selected from 2-ware or 3-wire. (data input from sbo pin is prohibited) first tansfer bit can be selected from msb or lsb. arbitrary size of 7 to 8 bits are selectable. (when selection size is 7 bits, firs t transfer bit setting is lsb only.) continuous transmission, continuous reception, continuous transmission/ reception are available. maximum transfer rate: 3.3 mbps clock source: output of timer a, b, c, d, e divided by 2, 16. external clock iic 0, 1, 2 (multi master iic) - multi master iic 100 khz/ 400 khz communication is supported. 7-bit, 10-bit slave address is settable. general call communication mode is supported. clock source : baud rate timer bin output (n=0 to 2), external clock a/d converter resolution : 10 bit channel : 16 channels clock source : clkbus/2, clkbus/4, clkbus/8, clkbus/16, clksx ? 2 d/a converter resolution : 10-bit unit : 2 units downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e auto reset auto reset function can be selected on/off power supply voltage detection circuit detection voltage can be set 2.6 v to 4.0 v by software clock monitoring function frequency error detection of external / pll clock hardware reset or non-maskable interrupt generatio n can be selected by program when a frequency error is detected. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e led driver :8 sets can controller ( mn103lf09/22/23/24/25/26/27/32/33/99/b2/b3/b4/b5/b6/b7/b8/b9/c0/c2/c3 series only) channels : 1 channel can 2.0b specification basis communication method : nrz (non-return to zero) transmission line : 2-wire serial communication communication channel: max 1 mbps data length : 0 to 8 byte message frame : standard frame and extended frame are supported (standard frame format id: 11 bits extended frame format id: 29 bits) buffer size : 136-bit ? 32 (transmission / reception) iebus ( mn103lf09/10/11/12/13/14/15/32/33/99/a0/a1/a2/a3/a4/a5/b8/b9/c0/c2/c3 series only) channels : 2 channels communication mode : select from mode1 and mode2 driver/receiver : external port function mn103lf09/12/15/18/21/24/27/99/a2/a5/a8/b1/b4/b7/c0 series i/o ports : 130 pins cmos i/o : 102 pins combination cmos i/o and oscillation pin : 4 pins combination cmos i/o and analog i/o : 16 pins combination cmos i/o and led driver : 8 pins special function pin : 5 pins reset input pin (nrst) (software reset is available) : 1 pin a/d converter reference voltage input pin (vrefh) : 1 pin capacity connect pin (vout18) : 1 pin function contol pins (nocdmod, atrst) : 2 pins power pins : 9 pins power supply pin(vdd50) : 3 pins gnd pins (vss) : 4 pins analog power supply pin(avdd) : 1 pins analog gnd pins (avss) : 1 pins downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e mn103lf11/14/17/20/23/26/33/a1/a4/a7/b0/b3/b6/b9/c3 series i/o ports : 115 pins cmos i/o : 87 pins combination cmos i/o and oscillation pin : 4 pins combination cmos i/o and analog i/o : 16 pins combination cmos i/o and led driver : 8 pins special function pin : 5 pins reset input pin (nrst) (software reset is available) : 1 pin a/d converter reference voltage input pin (vrefh) : 1 pin capacity connect pin (vout18) : 1 pin function contol pins (nocdmod, atrst) : 2 pins power pins : 8 pins power supply pin(vdd50) : 2 pins gnd pins (vss) : 4 pins analog power supply pin(avdd) : 1 pins analog gnd pins (avss) : 1 pins mn103lf10/13/16/19/22/25/32/a0/a3/a6/a9/b2/b5/b8/c2 series i/o ports : 87 pins cmos i/o : 59 pins combination cmos i/o and oscillation pin : 4 pins combination cmos i/o and analog i/o : 16 pins combination cmos i/o and led driver : 8 pins special function pin : 5 pins reset input pin (nrst) (software reset is available) : 1 pin a/d converter reference voltage input pin (vrefh) : 1 pin capacity connect pin (vout18) : 1 pin function contol pins (nocdmod, atrst) : 2 pins power pins : 8 pins power supply pin(vdd50) : 2 pins gnd pins (vss) : 4 pins analog power supply pin(avdd) : 1 pins analog gnd pins (avss) : 1 pins downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e package mn103lf09/12/15/18/21/24/27/99/a2/a5/a8/b1/b4/b7/c0 series : 144pin lqfp (20 mm ? 20 mm / 0.5 mm pitch, halogen free) mn103lf11/14/17/20/23/26/33/a1/a4/a7/b0/b3/b6/b9/c3 series : 128pin lqfp (18 mm ? 18 mm / 0.5 mm pitch, halogen free) mn103lf10/13/16/19/22/25/32/a0/a3/a6/a9/b2/b5/b8/c2 series : 100pin lqfp (14 mm ? 14 mm / 0.5 mm pitch, halogen free) mn103lf16n/m/k/x/w/t: 100pin qfp (18 mm ? 18 mm / 0.65 mm pitch) panasonic?s "halogen free" semiconductor products refer to the products made of molding resin and interposer which conform to the following standards. - bromine : 900 ppm (maximum concentration value) - chlorine : 900 ppm (maximum concentration value) - bromine + chlorine : 1500 ppm (maximum concentration value) the above-mentioned standards are based on the numerical value described in iec61249-2-21. antimony and its compounds are not added intentionally. power supply voltage vdd50 : 2.2 v to 5.5 v avdd : avdd=vdd50 (a/d converter or d/a converter is not used) avdd=vdd50 ? 2.7 v (a/d converter or d/a converter is used) operating temperature -40 ? c to +105 ? c downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.4 block diagram figure:1.4.1 mn103lf09 series block diagram .. functions in figure:1.4.1 are different for each series. refer to [ 1.3 ha rdware functions ] for detail of each series. .. ram 32-bit cpu core buscontrol timer interruptcontrol 97 factors a/d converter 10-bit, 16 input d/a converter 10-bit, x 2 8-bit x 1416-bit x 11 24h timer x 1 i/o port 130 pins dma 4ch 76 kb wdt x 2 clock & system control iebus x 2 1048 kb iic x 3 can x 1 serial i/f x 11 flashrom downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.5 pin specification 1.5.1 pin configuration figure:1.5.1 shows pin configuration of 144 pin version. fi gure:1.5.2 shows pin configuration of 128 pin version. figure:1.5.3 shows pin config uration of 100 pin version. table:1.5.1 shows pin specification of 144 pin version. ta ble:1.5.2 shows pin specification of 128 pin version. table:1.5.3 shows pin specification of 100 pin version. figure:1.5.1 pin configuration of 144 pin version vrefhph1/irq5c ph0/irq4c pa7/an7/tm20ioa pa6/an6/tm21ioa avdd pa5/an5/tm21gcpa/daout0c avss pa4/an4/tm21bka pa3/an3/tm22ioa/daout0b pa2/an2/sbt7a pa1/an1/sbi7a/daout0a pa0/an0/sbo7a pf6 pf5/sbt6b pf4/sbi6b pf3/sbo6b pd7/irq4b/tm12iob pd6/irq3b/tm12ioa pd5/irq2b pd4/irq1b(/irx1a)** pd3/irq0b(/itx1a)** pf2/sbt5b pf1/sbi5b pf0/sbo5b pd2/sbt2b/scl0b/sbt8a pd1/sbi2b/sbi8a pd0/sbo2b/sda0b/sbo8a p97/irq1c p96/irq0c p95/sbt3b/scl1b(/irx0a)** p94/sbi3b(/itx0a)** p93/sbo3b/sda1b p92/sbt0b p91/sbi0b/linrxdb(/crx0a)* p90/sbo0b/lintxdb(/ctx0a)* 144143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 p00/sbo1b/tm7ioa/sbo6a/an8 1 mn103lf09 seriesmn103lf12 series mn103lf15 series mn103lf18 series mn103lf21 series mn103lf24 series mn103lf27 series mn103lf99 series mn103lfa2 series mn103lfa5 series mn103lfa8 series mn103lfb1 series mn103lfb4 series mn103lfb7 series mn103lfc0 series 108 pg6 p01/sbi1b/tm7ob/sbi6a/an9/daout1a 2 107 pg5 p02/sbt1b/tm7oc/sbt6a/an10 3 106 p43 p03/sbo2a/sbo5a/sda0a/an11/daout1b 4 105 p42/sbt4a/scl2a/irq7/nmirq p04/sbi2a/sbi5a/an12 5 104 p41/sbo4a/sda2a/irq6 p05/sbt2a/sbt5a/scl0a/an13/daout1c 6 103 p40/sbi4a/tm11iob/d15 pb0/sbo4c/tm21gcpb 7 102 p87/led7/tm11ioa/d14 pb1/sbi4c/tm21bkb 8 101 p86/led6/tm10iob/d13 pb2/sbt4c/tm21iob 9 100 p85/led5/tm10ioa/d12 p06 10 99 p84/led4/tm9iob /d11 pb3/sbo8b 11 98 p83/led3/tm9ioa/d10 pb4/sbi8b 12 97 p82/led2/tm8iob/d9 pb5/sbt8b 13 96 p81/led1/tm8ioa/d8 p10/tm0io/an14/(ocd_sda) 14 95 pe7 p11/tm1io/an15/(ocd_scl) 15 94 pe6(/irx0b)** p12/tm2io/tm22iob 16 93 vdd50 pb6 17 92 p80/led0/tm3io pb7 18 91 vss p07 19 90 pe5(/itx0b)** nocdmod 20 89 pe4(/irx1b)** p44/osco 21 88 pe3(/itx1b)** p45/osci 22 87 p77/tmmio/sysclk vss 23 86 p76 p46/xi 24 85 p75/tmmod5/d7 p47/xo 25 84 p74/tmmod4/d6 vdd50 26 83 p73/tmmod3/d5 vout18 27 82 p72/tmmod2/d4 nrst 28 81 p71/tmmod1/d3 vss 29 80 p70/tmmod0/d2 at r s t 3 0 79 pe2 p13/irq5b/tm20iob/nwdovf2 31 78 pe1(/crx0b)* p14/sbo0a/nwe0/lintxda 32 77 pe0(/ctx0b)* p15/sbi0a/nwe1/linrxda 33 76 p67/key7/tm16iob/d1 p16/sbt0a/nre 34 75 p66/key6/tm16ioa/d0 pg0/irq2c 35 74 p65/key5/tm15iob/a0 pg1/irq3c 36 73 p64/key4/tm15ioa/a1 3738 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 p20/irq0a/ndk p21/irq1a/ncs1p22/irq2a/ncs2 p23/irq3ap24/irq4a pg2 p25/irq5a/a20 p30/sbo1a/a19 p31/sbi1a/a18 p32/sbt1a/a17 pc0/sbo4b/sda2b/sbo7b pc1/sbi4b/sbi7b pc2/sbt4b/scl2b/sbt7b p33/sbo3a/sda1a/a16 p34/sbi3a/tm4io/a15 p35/sbt3a/scl1a/a14 p50/a13 pc3pc4 pc5 p51/sbo9/a12 p52/sbi9/a11 p53/sbt9/a10 p54/sbo10/a9 p55/sbi10/a8 p56/sbt10/a7 p57/irq8/a6 p60/key0/tm13ioa/a5 p61/key1/tm13iob/a4 p62/key2/tm14ioa/a3 p63/key3/tm14iob/a2 vdd50 pg3vss pg4 pc6 * can-embedded series only. ** iebus-embedded series only. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e figure:1.5.2 pin configuration of 128 pin version mn103lf11 series mn103lf14 series mn103lf17 series mn103lf20 series mn103lf23 series mn103lf26 series mn103lf33 series mn103lfa1 series mn103lfa4 series mn103lfa7 series mn103lfb0 series mn103lfb3 series mn103lfb6 series mn103lfb9 series mn103lfc3 series vrefh pa7/an7/tm20ioa pa6/an6/tm21ioa avdd pa5/an5/tm21gcpa/daout0c avss pa4/an4/tm21bka pa3/an3/tm22ioa/daout0b pa2/an2/sbt7a pa1/an1/sbi7a/daout0a pa0/an0/sbo7a pf6 pf5/sbt6b pf4/sbi6b pf3/sbo6b pd7/irq4b/tm12iob pd6/irq3b/tm12ioa pd5/irq2b pd4/irq1b(/irx1a)** pd3/irq0b(/itx1a)** pf2/sbt5b pf1/sbi5b pf0/sbo5b pd2/sbt2b/scl0b/sbt8a pd1/sbi2b/sbi8a pd0/sbo2b/sda0b/sbo8a p95/sbt3b/scl1b(/irx0a)** p94/sbi3b(/itx0a)** p93/sbo3b/sda1b p92/sbt0b p91/sbi0b/linrxdb(/crx0a)* p90/sbo0b/lintxdb(/ctx0a)* 128127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 9998 97 p00/sbo1b/tm7ioa/sbo6a/an8 1 96 p43 p01/sbi1b/tm7ob/sbi6a/an9/daout1a 2 95 p42/sbt4a/scl2a/irq7/nmirq p02/sbt1b/tm7oc/sbt6a/an10 3 94 p41/sbo4a/sda2a/irq6 p03/sbo2a/sbo5a/sda0a/an11/daout1b 4 93 p40/sbi4a/tm11iob/d15 p04/sbi2a/sbi5a/an12 5 92 p87/led7/tm11ioa/d14 p05/sbt2a/sbt5a/scl0a/an13/daout1c 6 91 p86/led6/tm10iob/d13 pb0/sbo4c/tm21gcpb 7 90 p85/led5/tm10ioa/d12 pb1/sbi4c/tm21bkb 8 89 p84/led4/tm9iob /d11 pb2/sbt4c/tm21iob 9 88 p83/led3/tm9ioa/d10 p06 10 87 p82/led2/tm8iob/d9 pb3/sbo8b 11 86 p81/led1/tm8ioa/d8 pb4/sbi8b 12 85 pe6(/irx0b)** pb5/sbt8b 13 84 vdd50 p10/tm0io/an14/(ocd_sda) 14 83 p80/led0/tm3io p11/tm1io/an15/(ocd_scl) 15 82 vss p12/tm2io/tm22iob 16 81 pe5(/itx0b)** p07 17 80 pe4(/irx1b)** nocdmod 18 79 pe3(/itx1b)** p44/osco 19 78 p77/tmmio/sysclk p45/osci 20 77 p75/tmmod5/d7 vss 21 76 p74/tmmod4/d6 p46/xi 22 75 p73/tmmod3/d5 p47/xo 23 74 p72/tmmod2/d4 vdd50 24 73 p71/tmmod1/d3 vout18 25 72 p70/tmmod0/d2 nrst 26 71 pe2 vss 27 70 pe1(/crx0b)* atrst 28 69 pe0(/ctx0b)* p13/irq5b/tm20iob/nwdovf2 29 68 p67/key7/tm16iob/d1 p14/sbo0a/nwe0/lintxda 30 67 p66/key6/tm16ioa/d0 p15/sbi0a/nwe1/linrxda 31 66 p65/key5/tm15iob/a0 p16/sbt0a/nre 32 65 p64/key4/tm15ioa/a1 3334 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 p20/irq0a/ndk p21/irq1a/ncs1p22/irq2a/ncs2 p23/irq3ap24/irq4a p25/irq5a/a20 p30/sbo1a/a19 p31/sbi1a/a18 p32/sbt1a/a17 pc0/sbo4b/sda2b/sbo7b pc1/sbi4b/sbi7b pc2/sbt4b/scl2b/sbt7b p33/sbo3a/sda1a/a16 p34/sbi3a/tm4io/a15 p35/sbt3a/scl1a/a14 p50/a13 pc3pc4 pc5 p51/sbo9/a12 p52/sbi9/a11 p53/sbt9/a10 p54/sbo10/a9 p55/sbi10/a8 p56/sbt10/a7 p57/irq8/a6 p60/key0/tm13ioa/a5 p61/key1/tm13iob/a4 p62/key2/tm14ioa/a3 p63/key3/tm14iob/a2 vss pc6 * can-embedded series only. ** iebus-embedded series only. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e figure:1.5.3 pin configuration of 100 pin version vrefh pa7/an7/tm20ioa pa6/an6/tm21ioa avdd pa5/an5/tm21gcpa/daout0c avss pa4/an4/tm21bka pa3/an3/tm22ioa/daout0b pa2/an2/sbt7a pa1/an1/sbi7a/daout0a pa0/an0/sbo7a pd7/irq4b/tm12iob pd6/irq3b/tm12ioa pd5/irq2b pd4/irq1b(/irx1a)** pd3/irq0b(/itx1a)** pd2/sbt2b/scl0b/sbt8a pd1/sbi2b/sbi8a pd0/sbo2b/sda0b/sbo8a p95/sbt3b/scl1b(/irx0a)** p94/sbi3b(/itx0a)** p93/sbo3b/sda1b p92/sbt0b p91/sbi0b/linrxdb(/crx0a)* p90/sbo0b/lintxdb(/ctx0a)* 100 9998 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 p00/sbo1b/tm7ioa/sbo6a/an8 1 75 p43 p01/sbi1b/tm7ob/sbi6a/an9/daout1a 2 74 p42/sbt4a/scl2a/irq7/nmirq p02/sbt1b/tm7oc/sbt6a/an10 3 73 p41/sbo4a/sda2a/irq6 p03/sbo2a/sbo5a/sda0a/an11/daout1b 4 72 p40/sbi4a/tm11iob/d15 p04/sbi2a/sbi5a/an12 5 71 p87/led7/tm11ioa/d14 p05/sbt2a/sbt5a/scl0a/an13/daout1c 6 70 p86/led6/tm10iob/d13 p06 7 69 p85/led5/tm10ioa/d12 p10/tm0io/an14/(ocd_sda) 8 68 p84/led4/tm9iob /d11 p11/tm1io/an15/(ocd_scl) 9 67 p83/led3/tm9ioa/d10 p12/tm2io/tm22iob 10 66 p82/led2/tm8iob/d9 nocdmod 11 65 p81/led1/tm8ioa/d8 p44/osco 12 64 vdd50 p45/osci 13 63 p80/led0/tm3io vss 14 62 vss p46/xi 15 61 p77/tmmio/sysclk p47/xo 16 60 p75/tmmod5/d7 vdd50 17 59 p74/tmmod4/d6 vout18 18 58 p73/tmmod3/d5 nrst 19 57 p72/tmmod2/d4 vss 20 56 p71/tmmod1/d3 at r s t 2 1 55 p70/tmmod0/d2 p13/irq5b/tm20iob/nwdovf2 22 54 p67/key7/tm16iob/d1 p14/sbo0a/nwe0/lintxda 23 53 p66/key6/tm16ioa/d0 p15/sbi0a/nwe1/linrxda 24 52 p65/key5/tm15iob/a0 p16/sbt0a/nre 25 51 p64/key4/tm15ioa/a1 2627 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 p20/irq0a/ndk p21/irq1a/ncs1p22/irq2a/ncs2 p23/irq3ap24/irq4a p25/irq5a/a20 p30/sbo1a/a19 p31/sbi1a/a18 p32/sbt1a/a17 p33/sbo3a/sda1a/a16 p34/sbi3a/tm4io/a15 p35/sbt3a/scl1a/a14 p50/a13 p51/sbo9/a12 p52/sbi9/a11 p53/sbt9/a10 p54/sbo10/a9 p55/sbi10/a8 p56/sbt10/a7 p57/irq8/a6 p60/key0/tm13ioa/a5 p61/key1/tm13iob/a4 p62/key2/tm14ioa/a3 p63/key3/tm14iob/a2 vss mn103lf10 seriesmn103lf13 series mn103lf16 series mn103lf19 series mn103lf22 series mn103lf25 series mn103lf32 series mn103lfa0 series mn103lfa3 series mn103lfa6 series mn103lfa9 series mn103lfb2 series mn103lfb5 series mn103lfb8 series mn103lfc2 series * can-embedded series only.** iebus-embedded series only. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e table:1.5.1 pin specification of 144 pin version pin no. pin name pin condition at reset pin no. pin name pin condition at reset 1 p00 / sbo1b / tm7ioa / sbo6a / an8 hi-z 73 p64 / key4 / tm15ioa / a1 hi-z 2 p01 / sbi1b / tm7ob / sbi6a / an9 / daout1a hi-z 74 p65 / key5 / tm15iob / a0 hi-z 3 p02 / sbt1b / sbt6a / tm7oc / an10 hi-z 75 p66 / key6 / tm16ioa / d0 hi-z 4 p03 / sbo2a / sda0a / sbo5a / an11/ daout1b hi-z 76 p67 / key7 / tm16iob / d1 hi-z 5 p04 / sbi2a / sbi5a / an12 hi-z 77 pe0 (/ ctx0b) *2 hi-z 6 p05 / sbt2a / scl0a / sbt5a / an13/ daout1c hi-z 78 pe1 (/ crx0b) *2 hi-z 7 pb0 / sbo4c / tm21gcpb hi-z 79 pe2 hi-z 8 pb1 / sbi4c / tm21bkb hi-z 80 p70 / tmmod0 / d2 hi-z 9 pb2 / sbt4c / tm21iob hi-z 81 p71 / tmmod1 / d3 hi-z 10 p06 hi-z 82 p72 / tmmod2 / d4 hi-z 11 pb3 / sbo8b hi-z 83 p73 / tmmod3 / d5 hi-z 12 pb4 / sbi8b hi-z 84 p74 / tmmod4 / d6 hi-z 13 pb5 / sbt8b hi-z 85 p75 / tmmod5 / d7 hi-z 14 p10 / tm0io / an14 / (ocd_sda) (*1) 86 p76 hi-z 15 p11 / tm1io / an15 / (ocd_scl) (*1) 87 p77 / tmmio / sysclk hi-z 16 p12 / tm2io / tm22iob hi-z 88 pe3 (/ itx1b) *3 hi-z 17 pb6 hi-z 89 pe4 (/ irx1b) *3 hi-z 18 pb7 hi-z 90 pe5 (/ itx0b) *3 hi-z 19 p07 hi-z 91 vss - 20 nocdmod input 92 p80 / led0 / tm3io hi-z 21 osco / p44 hi-z 93 vdd50 - 22 osci / p45 hi-z 94 pe6 (/ irx0b) *3 hi-z 23 vss - 95 pe7 hi-z 24 xi / p46 hi-z 96 p81 / led1 / tm8ioa / d8 hi-z 25 xo / p47 hi-z 97 p82 / led2 / tm8iob / d9 hi-z 26 vdd50 - 98 p83 / led3 / tm9ioa / d10 hi-z 27 vout18 - 99 p84 / led4 / tm9iob / d11 hi-z 28 nrst input 100 p85 / led5 / tm10ioa / d12 hi-z 29 vss - 101 p86 / led6 / tm10iob / d13 hi-z 30 atrst input 102 p87 / led7 / tm11ioa / d14 hi-z 31 p13 / irq5b / tm20iob / nwdovf2 hi-z 103 p40 / sbi4a / tm11iob / d15 hi-z 32 p14 / sbo0a / nwe0/lintxda hi-z 104 p41 / sbo4a / sda2a / irq6 hi-z 33 p15 / sbi0a / nwe1/linrxda hi-z 105 p42 / sbt4a / scl2a / irq7 / nmirq hi-z 34 p16 / sbt0a / nre hi-z 106 p43 hi-z 35 pg0 / irq2c hi-z 107 pg5 hi-z 36 pg1 / irq3c hi-z 108 pg6 hi-z 37 p20 / irq0a / ndk hi-z 109 p90 / sbo0b / lintxdb (/ ctx0a) *2 hi-z 38 p21 / irq1a / ncs1 hi-z 110 p91 / sbi0b / linrxdb (/ crx0a) *2 hi-z 39 p22 / irq2a / ncs2 hi-z 111 p92 / sbt0b hi-z 40 p23 / irq3a hi-z 112 p93 / sbo3b / sda1b hi-z 41 p24 / irq4a hi-z 113 p94 / sbi3b (/ itx0a) *3 hi-z 42 pg2 hi-z 114 p95 / sbt3b / scl1b (/ irx0a) *3 hi-z 43 p25 / irq5a / a20 hi-z 115 p96 / irq0c hi-z 44 p30 / sbo1a / a19 hi-z 116 p97 / irq1c hi-z 45 p31 / sbi1a / a18 hi-z 117 pd0 / sbo2b / sda0b / sbo8a hi-z 46 p32 / sbt1a / a17 hi-z 118 pd1 / sbi2b / sbi8a hi-z 47 pc0 / sbo4b / sda2b / sbo7b hi-z 119 pd2 / sbt2b / scl0b / sbt8a hi-z 48 pc1 / sbi4b / sbi7b hi-z 120 pf0 / sbo5b hi-z 49 pc2 / sbt4b / scl2b / sbt7b hi-z 121 pf1 / sbi5b hi-z 50 p33 / sbo3a / sda1a / a16 hi-z 122 pf2 / sbt5b hi-z 51 p34 / sbi3a / tm4io / a15 hi-z 123 pd3 / irq0b (/ itx1a) *3 hi-z 52 p35 / sbt3a / scl1a / a14 hi-z 124 pd4 / irq1b (/ irx1a) *3 hi-z 53 p50 / a13 hi-z 125 pd5 / irq2b hi-z 54 pc3 hi-z 126 pd6 / irq3b / tm12ioa hi-z 55 pc4 hi-z 127 pd7 / irq4b / tm12iob hi-z 56 pc5 hi-z 128 pf3 / sbo6b hi-z 57 p51 / sbo9 / a12 hi-z 129 pf4 / sbi6b hi-z 58 p52 / sbi9 / a11 hi-z 130 pf5 / sbt6b hi-z 59 p53 / sbt9 / a10 hi-z 131 pf6 hi-z 60 p54 / sbo10 / a9 hi-z 132 pa0 / an0 / sbo7a hi-z 61 p55 / sbi10 / a8 hi-z 133 pa1 / an1 / sbi7a/ daout0a hi-z 62 p56 / sbt10 / a7 hi-z 134 pa2 / an2 / sbt7a hi-z 63 p57 / irq8 / a6 hi-z 135 pa3 / an3 / tm22ioa/ daout0b hi-z 64 p60 / key0 / tm13ioa / a5 hi-z 136 pa4 / an4 / tm21bka hi-z 65 p61 / key1 / tm13iob / a4 hi-z 137 avss - 66 p62 / key2 / tm14ioa / a3 hi-z 138 pa5 / an5 / tm21gcpa/ daout0c hi-z 67 p63 / key3 / tm14iob / a2 hi-z 139 avdd - 68 vdd50 - 140 pa6 / an6 / tm21ioa hi-z 69 pg3 hi-z 141 pa7 / an7 / tm20ioa hi-z 70 vss - 142 ph0 / irq4c hi-z 71 pg4 hi-z 143 ph1 / irq5c hi-z 72 pc6 hi-z 144 vrefh - *1 when nocdmod is ?h?, state is ?hi-z?. when nocdmod is ?l?, state is ?input?. *2 can-embedded series only.. *3 iebus-embedded series only.. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e table:1.5.2 pin specification of 128 pin version pin no. pin name pin condition at reset pin no. pin name pin condition at reset 1 p00 / sbo1b / tm7ioa / sbo6a / an8 hi-z 65 p64 / key4 / tm15ioa / a1 hi-z 2 p01 / sbi1b / tm7ob / sbi6a / an9 / daout1a hi-z 66 p65 / key5 / tm15iob / a0 hi-z 3 p02 / sbt1b / sbt6a / tm7oc / an10 hi-z 67 p66 / key6 / tm16ioa / d0 hi-z 4 p03 / sbo2a / sda0a / sbo5a / an11/ daout1b hi-z 68 p67 / key7 / tm16iob / d1 hi-z 5 p04 / sbi2a / sbi5a / an12 hi-z 69 pe0 (/ ctx0b) *2 hi-z 6 p05 / sbt2a / scl0a / sbt5a / an13/ daout1c hi-z 70 pe1 (/ crx0b) *2 hi-z 7 pb0 / sbo4c / tm21gcpb hi-z 71 pe2 hi-z 8 pb1 / sbi4c / tm21bkb hi-z 72 p70 / tmmod0 / d2 hi-z 9 pb2 / sbt4c / tm21iob hi-z 73 p71 / tmmod1 / d3 hi-z 10 p06 hi-z 74 p72 / tmmod2 / d4 hi-z 11 pb3 / sbo8b hi-z 75 p73 / tmmod3 / d5 hi-z 12 pb4 / sbi8b hi-z 76 p74 / tmmod4 / d6 hi-z 13 pb5 / sbt8b hi-z 77 p75 / tmmod5 / d7 hi-z 14 p10 / tm0io / an14 / (ocd_sda) (*1) 78 p77 / tmmio / sysclk hi-z 15 p11 / tm1io / an15 / (ocd_scl) (*1) 79 pe3 (/ itx1b)*3 hi-z 16 p12 / tm2io / tm22iob hi-z 80 pe4 (/ irx1b)*3 hi-z 17 p07 hi-z 81 pe5 (/ itx0b)*3 hi-z 18 nocdmod input 82 vss - 19 osco / p44 hi-z 83 p80 / led0 / tm3io hi-z 20 osci / p45 hi-z 84 vdd50 - 21 vss - 85 pe6 (/ irx0b)*3 hi-z 22 xi / p46 hi-z 86 p81 / led1 / tm8ioa / d8 hi-z 23 xo / p47 hi-z 87 p82 / led2 / tm8iob / d9 hi-z 24 vdd50 - 88 p83 / led3 / tm9ioa / d10 hi-z 25 vout18 - 89 p84 / led4 / tm9iob / d11 hi-z 26 nrst input 90 p85 / led5 / tm10ioa / d12 hi-z 27 vss - 91 p86 / led6 / tm10iob / d13 hi-z 28 atrst input 92 p87 / led7 / tm11ioa / d14 hi-z 29 p13 / irq5b / tm20iob / nwdovf2 hi-z 93 p40 / sbi4a / tm11iob / d15 hi-z 30 p14 / sbo0a / nwe0 / lintxda hi-z 94 p41 / sbo4a / sda2a / irq6 hi-z 31 p15 / sbi0a / nwe1 / linrxda hi-z 95 p42 / sbt4a / scl2a / irq7 / nmirq hi-z 32 p16 / sbt0a / nre hi-z 96 p43 hi-z 33 p20 / irq0a / ndk hi-z 97 p90 / sbo0b / lintxdb (/ ctx0a) *2 hi-z 34 p21 / irq1a / ncs1 hi-z 98 p91 / sbi0b / linrxdb (/ crx0a) *2 hi-z 35 p22 / irq2a / ncs2 hi-z 99 p92 / sbt0b hi-z 36 p23 / irq3a hi-z 100 p93 / sbo3b / sda1b hi-z 37 p24 / irq4a hi-z 101 p94 / sbi3b (/ itx0a)*3 hi-z 38 p25 / irq5a / a20 hi-z 102 p95 / sbt3b / scl1b (/ irx0a)*3 hi-z 39 p30 / sbo1a / a19 hi-z 103 pd0 / sbo2b / sda0b / sbo8a hi-z 40 p31 / sbi1a / a18 hi-z 104 pd1 / sbi2b / sbi8a hi-z 41 p32 / sbt1a / a17 hi-z 105 pd2 / sbt2b / scl0b / sbt8a hi-z 42 pc0 / sbo4b / sda2b / sbo7b hi-z 106 pf0 / sbo5b hi-z 43 pc1 / sbi4b / sbi7b hi-z 107 pf1 / sbi5b hi-z 44 pc2 / sbt4b / scl2b / sbt7b hi-z 108 pf2 / sbt5b hi-z 45 p33 / sbo3a / sda1a / a16 hi-z 109 pd3 / irq0b (/ itx1a)*3 hi-z 46 p34 / sbi3a / tm4io / a15 hi-z 110 pd4 / irq1b (/ irx1a)*3 hi-z 47 p35 / sbt3a / scl1a / a14 hi-z 111 pd5 / irq2b hi-z 48 p50 / a13 hi-z 112 pd6 / irq3b / tm12ioa hi-z 49 pc3 hi-z 113 pd7 / irq4b / tm12iob hi-z 50 pc4 hi-z 114 pf3 / sbo6b hi-z 51 pc5 hi-z 115 pf4 / sbi6b hi-z 52 p51 / sbo9 / a12 hi-z 116 pf5 / sbt6b hi-z 53 p52 / sbi9 / a11 hi-z 117 pf6 hi-z 54 p53 / sbt9 / a10 hi-z 118 pa0 / an0 / sbo7a hi-z 55 p54 / sbo10 / a9 hi-z 119 pa1 / an1 / sbi7a/ daout0a hi-z 56 p55 / sbi10 / a8 hi-z 120 pa2 / an2 / sbt7a hi-z 57 p56 / sbt10 / a7 hi-z 121 pa3 / an3 / tm22ioa/ daout0b hi-z 58 p57 / irq8 / a6 hi-z 122 pa4 / an4 / tm21bka hi-z 59 p60 / key0 / tm13ioa / a5 hi-z 123 avss - 60 p61 / key1 / tm13iob / a4 hi-z 124 pa5 / an5 / tm21gcpa/ daout0c hi-z 61 p62 / key2 / tm14ioa / a3 hi-z 125 avdd - 62 p63 / key3 / tm14iob / a2 hi-z 126 pa6 / an6 / tm21ioa hi-z 63 vss - 127 pa7 / an7 / tm20ioa hi-z 64 pc6 hi-z 128 vrefh - *1 when nocdmod is ?h?, state is ?hi-z?. when nocdmod is ?l?, state is ?input?. *2 can-embedded series only.. *3 iebus-embedded series only.. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e table:1.5.3 pin specification of 100 pin version pin no. pin name pin condition at reset pin no. pin name pin condition at reset 1 p00 / sbo1b / tm7ioa / sbo6a / an8 hi-z 51 p64 / key4 / tm15ioa / a1 hi-z 2 p01 / sbi1b / tm7ob / sbi6a / an9 / daout1a hi-z 52 p65 / key5 / tm15iob / a0 hi-z 3 p02 / sbt1b / tm7oc / sbt6a / an10 hi-z 53 p66 / key6 / tm16ioa / d0 hi-z 4 p03 / sbo2a / sbo5a / sda0a / an11/ daout1b hi-z 54 p67 / key7 / tm16iob / d1 hi-z 5 p04 / sbi2a / sbi5a / an12 hi-z 55 p70 / tmmod0 / d2 hi-z 6 p05 / sbt2a / sbt5a / scl0a / an13/ daout1c hi-z 56 p71 / tmmod1 / d3 hi-z 7 p06 hi-z 57 p72 / tmmod2 / d4 hi-z 8 p10 / tm0io / an14 / (ocd_sda) (*1) 58 p73 / tmmod3 / d5 hi-z 9 p11 / tm1io / an15 / (ocd_scl) (*1) 59 p74 / tmmod4 / d6 hi-z 10 p12 / tm2io / tm22iob hi-z 60 p75 / tmmod5 / d7 hi-z 11 nocdmod input 61 p77 / tmmio / sysclk hi-z 12 osco / p44 hi-z 62 vss - 13 osci / p45 hi-z 63 p80 / led0 / tm3io hi-z 14 vss - 64 vdd50 - 15 xi / p46 hi-z 65 p81 / led1 / tm8ioa / d8 hi-z 16 xo / p47 hi-z 66 p82 / led2 / tm8iob / d9 hi-z 17 vdd50 - 67 p83 / led3 / tm9ioa / d10 hi-z 18 vout18 - 68 p84 / led4 / tm9iob / d11 hi-z 19 nrst input 69 p85 / led5 / tm10ioa / d12 hi-z 20 vss - 70 p86 / led6 / tm10iob / d13 hi-z 21 atrst input 71 p87 / led7 / tm11ioa / d14 hi-z 22 p13 / irq5b / tm20iob / nwdovf2 hi-z 72 p40 / sbi4a / tm11iob / d15 hi-z 23 p14 / sbo0a / nwe0 / lintxda hi-z 73 p41 / sbo4a / sda2a / irq6 hi-z 24 p15 / sbi0a / nwe1 / linrxda hi-z 74 p42 / sbt4a / scl2a / irq7 / nmirq hi-z 25 p16 / sbt0a / nre hi-z 75 p43 hi-z 26 p20 / irq0a / ndk hi-z 76 p90 / sbo0b / lintxdb (/ ctx0a) *2 hi-z 27 p21 / irq1a / ncs1 hi-z 77 p91 / sbi0b / linrxdb (/ crx0a) *2 hi-z 28 p22 / irq2a / ncs2 hi-z 78 p92 / sbt0b hi-z 29 p23 / irq3a hi-z 79 p93 / sbo3b / sda1b hi-z 30 p24 / irq4a hi-z 80 p94 / sbi3b (/ itx0a) *3 hi-z 31 p25 / irq5a / a20 hi-z 81 p95 / sbt3b / scl1b (/ irx0a) *3 hi-z 32 p30 / sbo1a / a19 hi-z 82 pd0 / sbo2b / sda0b / sbo8a hi-z 33 p31 / sbi1a / a18 hi-z 83 pd1 / sbi2b / sbi8a hi-z 34 p32 / sbt1a / a17 hi-z 84 pd2 / sbt2b / scl0b / sbt8a hi-z 35 p33 / sbo3a / sda1a / a16 hi-z 85 pd3 / irq0b (/ itx1a) *3 hi-z 36 p34 / sbi3a / tm4io / a15 hi-z 86 pd4 / irq1b (/ irx1a) *3 hi-z 37 p35 / sbt3a / scl1a / a14 hi-z 87 pd5 / irq2b hi-z 38 p50 / a13 hi-z 88 pd6 / irq3b / tm12ioa hi-z 39 p51 / sbo9 / a12 hi-z 89 pd7 / irq4b / tm12iob hi-z 40 p52 / sbi9 / a11 hi-z 90 pa0 / an0 / sbo7a hi-z 41 p53 / sbt9 / a10 hi-z 91 pa1 / an1 / sbi7a / daout0a hi-z 42 p54 / sbo10 / a9 hi-z 92 pa2 / an2 / sbt7a hi-z 43 p55 / sbi10 / a8 hi-z 93 pa3 / an3 / tm22ioa / daout0b hi-z 44 p56 / sbt10 / a7 hi-z 94 pa4 / an4 / tm21bka hi-z 45 p57 / irq8 / a6 hi-z 95 avss - 46 p60 / key0 / tm13ioa / a5 hi-z 96 pa5 / an5 / tm21gcpa / daout0c hi-z 47 p61 / key1 / tm13iob / a4 hi-z 97 avdd - 48 p62 / key2 / tm14ioa / a3 hi-z 98 pa6 / an6 / tm21ioa hi-z 49 p63 / key3 / tm14iob / a2 hi-z 99 pa7 / an7 / tm20ioa hi-z 50 vss - 100 vrefh - *1 when nocdmod is ?h?, state is ?hi-z?. when nocdmod is ?l?, state is ?input?. *2 can-embedded series only.. *3 iebus-embedded series only.. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.5.2 pin functions table:1.5.4 shows pin functions of 144 pin version. table:1.5.4 pin functions of 144 pin version pin other function description power supply / ground * vdd50 on-chip regulator power supply power supply for i/o avdd power supply for analog operation. vout18 power supply for internal circuit. vrefh reference power supply pin for the a/d converter. avss ground pin for analog. vss ground function control * atrst auto reset setting pin. nocdmod on-chip debug function (ocd) control pin reset nrst reset signal input pin (active low) clock osci p45 high-speed oscillation input pin (clkosc) (4 to 20 mhz) osco p44 high-speed oscillation output pin xi p46 low-speed oscillation input pin (clkx = 32.768 khz) xo p47 low-speed oscillation output pin sysclk p77 tmmio system clock signal output pin bus a20 p25 irq5a address output pins at memory expansion mode a19 p30 sbo1a a18 p31 sbi1a a17 p32 sbt1a a16 p33 sbo3a sda1a a15 p34 sbi3a tm4io a14 p35 sbt3a scl11a a13 p50 a12 p51 sbo9 a11 p52 sbi9 a10 p53 sbt9 a9 p54 sbo10 a8 p55 sbi10 a7 p56 sbt10 a6 p57 irq8 a5 p60 key0 tm13ioa a4 p61 key1 tm13iob a3 p62 key2 tm14ioa a2 p63 key3 tm14iob a1 p64 key4 tm15ioa a0 p65 key5 tm15iob d15 p40 sbi4a tm11iob data i/o pins at memory expansion mode d14 p87 led7 tm11ioa d13 p86 led6 tm10iob d12 p85 led5 tm10ioa d11 p84 led4 tm9iob d10 p83 led3 tm9ioa d9 p82 led2 tm8iob d8 p81 led1 tm8ioa d7 p75 tmmod5 d6 p74 tmmod4 refer to [chapter overview] of lsi user?s manual for detail about note of vdd and function contro l pins. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e bus d5 p73 tmmod3 data i/o pins at memory expansion mode d4 p72 tmmod2 d3 p71 tmmod1 d2 p70 tmmod0 d1 p67 key7 tm16iob d0 p66 key6 tm16ioa ncs2 p22 irq2a chip select signal output pins (active low) ncs1 p21 irq1a nre p16 sbt0a read enable signal output pin (active low) nwe1 p15 sbi0a linrxda write enable signal output pins (active low) nwe0 p14 sbo0a lintxda ndk p20 irq0a acknowledge signal input pin (active low) watchdog timer 2 nwdovf2 p13 irq5b tm20iob watchdog timer 2 over flow (active low) interrupt nmirq p42 irq7 sbt4a scl2a non-maskable interrupt request signal input pin (active low) irq8 p57 a6 external interrupt request signal input pin 8 irq7 p42 nmirq sbt4a scl2a external interrupt request signal input pin 7 irq6 p41 sbo4a sda2a external interrupt request signal input pin 6 irq5a p25 a20 external interrupt request signal input pin 5 (pin change is possible) irq5b p13 tm20iob nwdovf2 irq5c ph1 irq4a p24 external interrupt request signal input pin 4 (pin change is possible) irq4b pd7 tm12iob irq4c ph0 irq3a p23 external interrupt request signal input pin 3 (pin change is possible) irq3b pd6 tm12ioa irq3c pg1 irq2a p22 ncs2 external interrupt request signal input pin 2 (pin change is possible) irq2b pd5 irq2c pg0 irq1a p21 ncs1 external interrupt request signal input pin 1 (pin change is possible) irq1b pd4 (irx1a)** irq1c p97 irq0a p20 ndk external interrupt request signal input pin 0 (pin change is possible) irq0b pd3 (itx1a)** irq0c p96 key7 p67 d1 tm16iob key input interrupt key6 p66 d0 tm16ioa key5 p65 a0 tm15iob key4 p64 a1 tm15ioa key3 p63 a2 tm14iob key2 p62 a3 tm14ioa key1 p61 a4 tm13iob key0 p60 a5 tm13ioa timer tm0io p10 ocd_sda an14 8-bit timer 0 to 4 i/o pins tm1io p11 ocd_scl an15 tm2io p12 tm22iob tm3io p80 led0 tm4io p34 a15 sbi3a tm7ioa p00 sbo1b sbo6a an8 16-bit timer 7 i/o pin a, output pin b, c tm7ob p01 sbi1b sbi6a an9 daout1a tm7oc p02 sbt1b sbt6a an10 * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e timer tm8ioa p81 d8 led1 16-bit timer 8 to 16 i/o pins a, b tm8iob p82 d9 led2 tm9ioa p83 d10 led3 tm9iob p84 d11 led4 tm10ioa p85 d12 led5 tm10iob p86 d13 led6 tm11ioa p87 d14 led7 tm11iob p40 d15 sbi4a tm12ioa pd6 irq3b tm12iob pd7 irq4b tm13ioa p60 key0 a5 tm13iob p61 key1 a4 tm14ioa p62 key2 a3 tm14iob p63 key3 a2 tm15ioa p64 key4 a1 tm15iob p65 key5 a0 tm16ioa p66 key6 d0 tm16iob p67 key7 d1 tm20ioa pa7 an7 8-bit timer 20 to 22 i/o pins (pin change is possible) tm20iob p13 irq5b nwdovf2 tm21ioa pa6 an6 tm21iob pb2 sbt4c tm22ioa pa3 an3 daout0b tm22iob p12 tm2io tm21bka pa4 an4 8-bit timer 21 i/o pins (pin change is possible) tm21bkb pb1 sbi4c tm21gcpa pa5 an5 daout0c tm21gcpb pb0 sbo4c tmmod0 p70 d2 motor control 16-bit timer i/o pins tmmod1 p71 d3 tmmod2 p72 d4 tmmod3 p73 d5 tmmod4 p74 d6 tmmod5 p75 d7 tmmio p77 sysclk serial sbt0a p16 nre serial clock i/o pins (pin change is possible) - clock synchronous/uart sbt0b p92 sbt1a p32 a17 sbt1b p02 sbt6a tm7oc an10 sbt2a p05 sbt5a scl0a an13 daout1c sbt2b pd2 sbt8a scl0b sbt3a p35 a14 scl1a sbt3b p95 scl1b (irx0a)** sbt4a p42 scl2a irq7 nmirq sbt4b pc2 sbt7b scl2b sbt4c pb2 tm21iob sbt5a p05 sbt2a scl0a an13 daout1c sbt5b pf2 sbt6a p02 sbt1b tm7oc an10 sbt6b pf5 sbt7a pa2 an2 sbt7b pc2 sbt4b scl2b sbt8a pd2 sbt2b scl0b sbt8b pb5 sbt9 p53 sbt10 p56 * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e serial sbo0a p14 nwe0 lintxda serial data output pins (pin change is possible) - clock synchronous/uart sbo0b p90 (ctx0a)* lintxdb sbo1a p30 a19 sbo1b p00 sbo6a tm7ioa an8 sbo2a p03 sbo5a sda0a an11 daout1b sbo2b pd0 sbo8a sda0b sbo3a p33 a16 sda1a sbo3b p93 sda1b sbo4a p41 sda2a irq6 sbo4b pc0 sbo7b sda2b sbo4c pb0 tm21gcpb sbo5a p03 sbo2a sda0a an11 daout1b sbo5b pf0 sbo6a p00 sbo1b tm7ioa an8 sbo6b pf3 sbo7a pa0 an0 sbo7b pc0 sbo4b sda2b sbo8a pd0 sbo2b sda0b sbo8b pb3 sbo9 p51 a12 sbo10 p54 a9 sbi0a p15 nwe1 linrxda serial data input pins (pin change is possible) - clock synchronous/uart sbi0b p91 (crx0a)* linrxdb sbi1a p31 a18 sbi1b p01 sbi6a tm7ob an9 daout1a sbi2a p04 sbi5a an12 sbi2b pd1 sbi8a sbi3a p34 a15 tm4io sbi3b p94 (itx0a)** sbi4a p40 d15 tm11iob sbi4b pc1 sbi7b sbi4c pb1 tm21bkb sbi5a p04 sbi2a an12 sbi5b pf1 sbi6a p01 sbi1b tm7ob an9 daout1a sbi6b pf4 sbi7a pa1 an1 daout0a sbi7b pc1 sbi4b sbi8a pd1 sbi2b sbi8b pb4 sbi9 p52 a11 sbi10 p55 a8 iic scl0a p05 sbt2a sbt5a an13 daout1c iic clock i/o pins (pin change is possible) scl0b pd2 sbt2b sbt8a scl1a p35 a14 sbt3a scl1b p95 sbt3b (irx0a)** scl2a p42 sbt4a irq7 nmirq scl2b pc2 sbt4b sbt7b sda0a p03 sbo2a sbo5a an11 daout1b iic data i/o pins (pin change is possible) sda0b pd0 sbo2b sbo8a sda1a p33 a16 sbo3a sda1b p93 sbo3b sda2a p41 sbo4a irq6 sda2b pc0 sbo4b sbo7b * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e lin lintxda p14 sbo0a nwe0 lin data transmission pin (pin change is possible) lintxdb p90 sbo0b (ctx0a) * linrxda p15 sbi0a nwe1 lin data recept ion pin (pin change is possible) linrxdb p91 sbi0b (crx0a) * can * ctx0a p90 sbo0b lintxdb can data transmission pin (pin change is possible) ctx0b pe0 crx0a p91 sbi0b linrxdb can data reception pin (pin change is possible) crx0b pe1 iebus ** itx0a p94 sbi3b iebus data transmission pin (pin change is possible) itx0b pe5 itx1a pd3 irq0b itx1b pe3 irx0a p95 sbt3b scl1b iebus data reception pin (pin change is possible) irx0b pe6 irx1a pd4 irq1b irx1b pe4 a/d converter an0 pa0 sbo7a analog input pins an1 pa1 sbi7a daout0a an2 pa2 sbt7a an3 pa3 tm22ioa daout0b an4 pa4 tm21bka an5 pa5 tm21gcpa daout0c an6 pa6 tm21ioa an7 pa7 tm20ioa an8 p00 sbo1b tm7ioa sbo6a an9 p01 sbi1b tm7ob sbi6a daout1a an10 p02 sbt1b tm7oc sbt6a an11 p03 sbo2a sbo5a sda0a daout1b an12 p04 sbi2a sbi5a an13 p05 sbt2a sbt5a scl0a daout1c an14 p10 tm0io ocd_sda an15 p11 tm1io ocd_scl d/a converter daout0a pa1 sbi7a an1 analog output pins daout0b pa3 tm22ioa an3 daout0c pa5 tm21gcpa an5 daout1a p01 sbi1b tm7ob sbi6a an9 daout1b p03 sbo2a sbo5a sda0a an11 daout1c p05 sbt2a sbt5a scl0a an13 i/o port p00 sbo1b tm7ioa sbo6a an8 general purpose i/o port 0 p01 sbi1b tm7ob sbi6a an9 daout1a p02 sbt1b tm7oc sbt6a an10 p03 sbo2a sbo5a sda0a an11 daout1b p04 sbi2a sbi5a an12 p05 sbt2a sbt5a scl0a an13 daout1c p06 p07 p10 ocd_sda tm0io an14 general purpose i/o port 1 p11 ocd_scl tm1io an15 p12 tm2io tm22iob p13 irq5b tm20iob nwdovf2 p14 nwe0 sbo0a lintxda p15 nwe1 sbi0a linrxda p16 nre sbt0a * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e i/o port p20 ndk irq0a general purpose i/o port 2 p21 ncs1 irq1a p22 ncs2 irq2a p23 irq3a p24 irq4a p25 a20 irq5a p30 a19 sbo1a general purpose i/o port 3 p31 a18 sbi1a p32 a17 sbt1a p33 a16 sbo3a sda1a p34 a15 sbi3a tm4io p35 a14 sbt3a scl1a p40 d15 sbi4a tm11iob general purpose i/o port 4 p41 sbo4a sda2a irq6 p42 sbt4a scl2a irq7 nmirq p43 p44 osco p45 osci p46 xi p47 xo p50 a13 general purpose i/o port 5 p51 a12 sbo9 p52 a11 sbi9 p53 a10 sbt9 p54 a9 sbo10 p55 a8 sbi10 p56 a7 sbt10 p57 a6 irq8 p60 a5 key0 tm13ioa general purpose i/o port 6 p61 a4 key1 tm13iob p62 a3 key2 tm14ioa p63 a2 key3 tm14iob p64 a1 key4 tm15ioa p65 a0 key5 tm15iob p66 d0 key6 tm16ioa p67 d1 key7 tm16iob p70 d2 tmmod0 general purpose i/o port 7 p71 d3 tmmod1 p72 d4 tmmod2 p73 d5 tmmod3 p74 d6 tmmod4 p75 d7 tmmod5 p76 p77 sysclk tmmio p80 tm3io led0 general purpose i/o port 8 p81 d8 tm8ioa led1 p82 d9 tm8iob led2 p83 d10 tm9ioa led3 p84 d11 tm9iob led4 p85 d12 tm10ioa led5 p86 d13 tm10iob led6 p87 d14 tm11ioa led7 * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e i/o port p90 sbo0b (ctx0a)* lintxdb general purpose i/o port 9 p91 sbi0b (crx0a)* linrxdb p92 sbt0b p93 sbo3b sda1b p94 sbi3b (itx0a)** p95 sbt3b scl1b (irx0a)** p96 irq0c p97 irq1c pa0 sbo7a an0 general purpose i/o port a pa1 sbi7a an1 daout0a pa2 sbt7a an2 pa3 tm22ioa an3 daout0b pa4 tm21bka an4 pa5 tm21gcpa an5 daout0c pa6 tm21ioa an6 pa7 tm20ioa an7 pb0 sbo4c tm21gcpb general purpose i/o port b pb1 sbi4c tm21bkb pb2 sbt4c tm21iob pb3 sbo8b pb4 sbi8b pb5 sbt8b pb6 pb7 pc0 sbo4b sbo7b sda2b general purpose i/o port c pc1 sbi4b sbi7b pc2 sbt4b sbt7b scl2b pc3 pc4 pc5 pc6 pd0 sbo2b sbo8a sda0b general purpose i/o port d pd1 sbi2b sbi8a pd2 sbt2b sbt8a scl0b pd3 (itx1a)** irq0b pd4 (irx1a)** irq1b pd5 irq2b pd6 tm12ioa irq3b pd7 tm12iob irq4b pe0 (ctx0b)* general purpose i/o port e pe1 (crx0b)* pe2 pe3 (itx1b)** pe4 (irx1b)** pe5 (itx0b)** pe6 (irx0b)** pe7 pf0 sbo5b general purpose i/o port f pf1 sbi5b pf2 sbt5b pf3 sbo6b pf4 sbi6b pf5 sbt6b pf6 * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e i/o port pg0 irq2c general purpose i/o port g pg1 irq3c pg2 pg3 pg4 pg5 pg6 ph0 irq4c general purpose i/o port h ph1 irq5c led led0 p80 tm3io led drive pins led1 p81 d8 tm8ioa led2 p82 d9 tm8iob led3 p83 d10 tm9ioa led4 p84 d11 tm9iob led5 p85 d12 tm10ioa led6 p86 d13 tm10iob led7 p87 d14 tm11ioa ocd ocd_sda p10 tm0io an14 clock input pin for on-chip debug function. ocs_scl p11 tm1io an15 data i/o pin for on-chip debug function. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e table:1.5.5 shows pin functions of 128 pin version. table:1.5.5 pin functions of 128 pin version pin other function description power supply / ground * vdd50 on-chip regulator power supply power supply for i/o avdd power supply for analog operation. vout18 power supply for internal circuit. vrefh reference power supply pin for the a/d converter. avss ground pin for analog. vss ground function control * atrst auto reset setting pin nocdmod on-chip debug function (ocd) control pin reset nrst reset signal input pin (active low) clock osci p45 high-speed oscillation input pin (clkosc) (4 to 20 mhz) osco p44 high-speed oscillation output pin xi p46 low-speed oscillation input pin (clkx = 32.768 khz) xo p47 low-speed oscillation output pin sysclk p77 tmmio system clock signal output pin bus a20 p25 irq5a address output pins at memory expansion mode a19 p30 sbo1a a18 p31 sbi1a a17 p32 sbt1a a16 p33 sbo3a sda1a a15 p34 sbi3a tm4io a14 p35 sbt3a scl11a a13 p50 a12 p51 sbo9 a11 p52 sbi9 a10 p53 sbt9 a9 p54 sbo10 a8 p55 sbi10 a7 p56 sbt10 a6 p57 irq8 a5 p60 key0 tm13ioa a4 p61 key1 tm13iob a3 p62 key2 tm14ioa a2 p63 key3 tm14iob a1 p64 key4 tm15ioa a0 p65 key5 tm15iob refer to [chapter overview] of lsi user?s manual for detail about note of vdd and function contro l pins. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e bus d15 p40 sbi4a tm11iob data i/o pins at memory expansion mode d14 p87 led7 tm11ioa d13 p86 led6 tm10iob d12 p85 led5 tm10ioa d11 p84 led4 tm9iob d10 p83 led3 tm9ioa d9 p82 led2 tm8iob d8 p81 led1 tm8ioa d7 p75 tmmod5 d6 p74 tmmod4 d5 p73 tmmod3 d4 p72 tmmod2 d3 p71 tmmod1 d2 p70 tmmod0 d1 p67 key7 tm16iob d0 p66 key6 tm16ioa ncs2 p22 irq2a chip select signal output pins (active low) ncs1 p21 irq1a nre p16 sbt0a read enable signal output pin (active low) nwe1 p15 sbi0a linrxda write enable signal output pins (active low) nwe0 p14 sbo0a lintxda ndk p20 irq0a acknowledge signal input pin (active low) watchdog timer 2 nwdovf2 p13 irq5b tm20iob watchdog timer 2 over flow (active low) interrupt nmirq p42 irq7 sbt4a scl2a non-maskable interrupt request signal input pin (active low) irq8 p57 a6 external interrupt request signal input pin 8 irq7 p42 nmirq sbt4a scl2a external interrupt request signal input pin 7 irq6 p41 sbo4a sda2a external interrupt request signal input pin 6 irq5a p25 a20 external interrupt request signal input pin 5 (pin change is possible) irq5b p13 tm20iob nwdovf2 irq4a p24 external interrupt request signal input pin 4 (pin change is possible) irq4b pd7 tm12iob irq3a p23 external interrupt request signal input pin 3 (pin change is possible) irq3b pd6 tm12ioa irq2a p22 ncs2 external interrupt request signal input pin 2 (pin change is possible) irq2b pd5 irq1a p21 ncs1 external interrupt request signal input pin 1 (pin change is possible) irq1b pd4 (irx1a)** irq0a p20 ndk external interrupt request signal input pin 0 (pin change is possible) irq0b pd3 (itx1a)** key7 p67 d1 tm16iob key input interrupt key6 p66 d0 tm16ioa key5 p65 a0 tm15iob key4 p64 a1 tm15ioa key3 p63 a2 tm14iob key2 p62 a3 tm14ioa key1 p61 a4 tm13iob key0 p60 a5 tm13ioa timer tm0io p10 ocd_sda an14 8-bit timer 0 to 4 i/o pins tm1io p11 ocd_scl an15 tm2io p12 tm22iob tm3io p80 led0 tm4io p34 a15 sbi3a tm7ioa p00 sbo1b sbo6a an8 16-bit timer 7 i/o pin a, output pin b, c tm7ob p01 sbi1b sbi6a an9 daout1a tm7oc p02 sbt1b sbt6a an10 * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e timer tm8ioa p81 d8 led1 16-bit timer 8 to 16 i/o pins a, b tm8iob p82 d9 led2 tm9ioa p83 d10 led3 tm9iob p84 d11 led4 tm10ioa p85 d12 led5 tm10iob p86 d13 led6 tm11ioa p87 d14 led7 tm11iob p40 d15 sbi4a tm12ioa pd6 irq3b tm12iob pd7 irq4b tm13ioa p60 key0 a5 tm13iob p61 key1 a4 tm14ioa p62 key2 a3 tm14iob p63 key3 a2 tm15ioa p64 key4 a1 tm15iob p65 key5 a0 tm16ioa p66 key6 d0 tm16iob p67 key7 d1 tm20ioa pa7 an7 8-bit timer 20 to 22 i/o pins (pin change is possible) tm20iob p13 irq5b nwdovf2 tm21ioa pa6 an6 tm21iob pb2 sbt4c tm22ioa pa3 an3 daout0b tm22iob p12 tm2io tm21bka pa4 an4 8-bit timer 21 i/o pins (pin change is possible) tm21bkb pb1 sbi4c tm21gcpa pa5 an5 daout0c tm21gcpb pb0 sbo4c tmmod0 p70 d2 motor control 16-bit timer i/o pins tmmod1 p71 d3 tmmod2 p72 d4 tmmod3 p73 d5 tmmod4 p74 d6 tmmod5 p75 d7 tmmio p77 sysclk serial sbt0a p16 nre serial clock i/o pins (pin change is possible) - clock synchronous/uart sbt0b p92 sbt1a p32 a17 sbt1b p02 sbt6a tm7oc an10 sbt2a p05 sbt5a scl0a an13 daout1c sbt2b pd2 sbt8a scl0b sbt3a p35 a14 scl1a sbt3b p95 scl1b (irx0a)** sbt4a p42 scl2a irq7 nmirq sbt4b pc2 sbt7b scl2b sbt4c pb2 tm21iob sbt5a p05 sbt2a scl0a an13 daout1c sbt5b pf2 sbt6a p02 sbt1b tm7oc an10 sbt6b pf5 sbt7a pa2 an2 sbt7b pc2 sbt4b scl2b sbt8a pd2 sbt2b scl0b sbt8b pb5 sbt9 p53 sbt10 p56 * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e serial sbo0a p14 nwe0 lintxda serial data output pins (pin change is possible) - clock synchronous/uart sbo0b p90 (ctx0a)* lintxdb sbo1a p30 a19 sbo1b p00 sbo6a tm7ioa an8 sbo2a p03 sbo5a sda0a an11 daout1b sbo2b pd0 sbo8a sda0b sbo3a p33 a16 sda1a sbo3b p93 sda1b sbo4a p41 sda2a irq6 sbo4b pc0 sbo7b sda2b sbo4c pb0 tm21gcpb sbo5a p03 sbo2a sda0a an11 daout1b sbo5b pf0 sbo6a p00 sbo1b tm7ioa an8 sbo6b pf3 sbo7a pa0 an0 sbo7b pc0 sbo4b sda2b sbo8a pd0 sbo2b sda0b sbo8b pb3 sbo9 p51 a12 sbo10 p54 a9 sbi0a p15 nwe1 linrxda serial data input pins (pin change is possible) - clock synchronous/uart sbi0b p91 (crx0a)* linrxdb sbi1a p31 a18 sbi1b p01 sbi6a tm7ob an9 daout1a sbi2a p04 sbi5a an12 sbi2b pd1 sbi8a sbi3a p34 a15 tm4io sbi3b p94 (itx0a)** sbi4a p40 d15 tm11iob sbi4b pc1 sbi7b sbi4c pb1 tm21bkb sbi5a p04 sbi2a an12 sbi5b pf1 sbi6a p01 sbi1b tm7ob an9 daout1a sbi6b pf4 sbi7a pa1 an1 daout0a sbi7b pc1 sbi4b sbi8a pd1 sbi2b sbi8b pb4 sbi9 p52 a11 sbi10 p55 a8 iic scl0a p05 sbt2a sbt5a an13 daout1c iic clock i/o pins scl0b pd2 sbt2b sbt8a scl1a p35 a14 sbt3a scl1b p95 sbt3b (irx0a)** scl2a p42 sbt4a irq7 nmirq scl2b pc2 sbt4b sbt7b sda0a p03 sbo2a sbo5a an11 daout1b iic data i/o pins sda0b pd0 sbo2b sbo8a sda1a p33 a16 sbo3a sda1b p93 sbo3b sda2a p41 sbo4a irq6 sda2b pc0 sbo4b sbo7b * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e lin lintxda p14 sbo0a nwe0 lin data transmission pin (pin change is possible) lintxdb p90 sbo0b (ctx0a) * linrxda p15 sbi0a nwe1 lin data recept ion pin (pin change is possible) linrxdb p91 sbi0b (crx0a) * can * ctx0a p90 sbo0b lintxdb can data transmission pin (pin change is possible) ctx0b pe0 crx0a p91 sbi0b linrxdb can data reception pin (pin change is possible) crx0b pe1 iebus ** itx0a p94 sbi3b iebus data transmission pin (pin change is possible) itx0b pe5 itx1a pd3 irq0b itx1b pe3 irx0a p95 sbt3b scl1b iebus data reception pin (pin change is possible) irx0b pe6 irx1a pd4 irq1b irx1b pe4 a/d converter an0 pa0 sbo7a analog input pins an1 pa1 sbi7a daout0a an2 pa2 sbt7a an3 pa3 tm22ioa daout0b an4 pa4 tm21bka an5 pa5 tm21gcpa daout0c an6 pa6 tm21ioa an7 pa7 tm20ioa an8 p00 sbo1b tm7ioa sbo6a an9 p01 sbi1b tm7ob sbi6a daout1a an10 p02 sbt1b tm7oc sbt6a an11 p03 sbo2a sbo5a sda0a daout1b an12 p04 sbi2a sbi5a an13 p05 sbt2a sbt5a scl0a daout1c an14 p10 tm0io ocd_sda an15 p11 tm1io ocd_scl d/a converter daout0a pa1 sbi7a an1 analog output pins daout0b pa3 tm22ioa an3 daout0c pa5 tm21gcpa an5 daout1a p01 sbi1b tm7ob sbi6a an9 daout1b p03 sbo2a sbo5a sda0a an11 daout1c p05 sbt2a sbt5a scl0a an13 i/o port p00 sbo1b tm7ioa sbo6a an8 general purpose i/o port 0 p01 sbi1b tm7ob sbi6a an9 daout1a p02 sbt1b tm7oc sbt6a an10 p03 sbo2a sbo5a sda0a an11 daout1b p04 sbi2a sbi5a an12 p05 sbt2a sbt5a scl0a an13 daout1c p06 p07 p10 ocd_sda tm0io an14 general purpose i/o port 1 p11 ocd_scl tm1io an15 p12 tm2io tm22iob p13 irq5b tm20iob nwdovf2 p14 nwe0 sbo0a lintxda p15 nwe1 sbi0a linrxda p16 nre sbt0a * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e i/o port p20 ndk irq0a general purpose i/o port 2 p21 ncs1 irq1a p22 ncs2 irq2a p23 irq3a p24 irq4a p25 a20 irq5a p30 a19 sbo1a general purpose i/o port 3 p31 a18 sbi1a p32 a17 sbt1a p33 a16 sbo3a sda1a p34 a15 sbi3a tm4io p35 a14 sbt3a scl1a p40 d15 sbi4a tm11iob general purpose i/o port 4 p41 sbo4a sda2a irq6 p42 sbt4a scl2a irq7 nmirq p43 p44 osco p45 osci p46 xi p47 xo p50 a13 general purpose i/o port 5 p51 a12 sbo9 p52 a11 sbi9 p53 a10 sbt9 p54 a9 sbo10 p55 a8 sbi10 p56 a7 sbt10 p57 a6 irq8 p60 a5 key0 tm13ioa general purpose i/o port 6 p61 a4 key1 tm13iob p62 a3 key2 tm14ioa p63 a2 key3 tm14iob p64 a1 key4 tm15ioa p65 a0 key5 tm15iob p66 d0 key6 tm16ioa p67 d1 key7 tm16iob p70 d2 tmmod0 general purpose i/o port 7 p71 d3 tmmod1 p72 d4 tmmod2 p73 d5 tmmod3 p74 d6 tmmod4 p75 d7 tmmod5 p77 sysclk tmmio p80 tm3io led0 general purpose i/o port 8 p81 d8 tm8ioa led1 p82 d9 tm8iob led2 p83 d10 tm9ioa led3 p84 d11 tm9iob led4 p85 d12 tm10ioa led5 p86 d13 tm10iob led6 p87 d14 tm11ioa led7 p90 sbo0b (ctx0a)* lintxdb general purpose i/o port 9 p91 sbi0b (crx0a)* linrxdb p92 sbt0b p93 sbo3b sda1b p94 sbi3b (itx0a)** p95 sbt3b scl1b (irx0a)** * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e i/o port pa0 sbo7a an0 general purpose i/o port a pa1 sbi7a an1 daout0a pa2 sbt7a an2 pa3 tm22ioa an3 daout0b pa4 tm21bka an4 pa5 tm21gcpa an5 daout0c pa6 tm21ioa an6 pa7 tm20ioa an7 pb0 sbo4c tm21gcpb general purpose i/o port b pb1 sbi4c tm21bkb pb2 sbt4c tm21iob pb3 sbo8b pb4 sbi8b pb5 sbt8b pc0 sbo4b sbo7b sda2b general purpose i/o port c pc1 sbi4b sbi7b pc2 sbt4b sbt7b scl2b pc3 pc4 pc5 pc6 pd0 sbo2b sbo8a sda0b general purpose i/o port d pd1 sbi2b sbi8a pd2 sbt2b sbt8a scl0b pd3 (itx1a)** irq0b pd4 (irx1a)** irq1b pd5 irq2b pd6 tm12ioa irq3b pd7 tm12iob irq4b pe0 (ctx0b)* general purpose i/o port e pe1 (crx0b)* pe2 pe3 (itx1b)** pe4 (irx1b)** pe5 (itx0b)** pe6 (irx0b)** pf0 sbo5b general purpose i/o port f pf1 sbi5b pf2 sbt5b pf3 sbo6b pf4 sbi6b pf5 sbt6b pf6 led led0 p80 tm3io led drive pins led1 p81 d8 tm8ioa led2 p82 d9 tm8iob led3 p83 d10 tm9ioa led4 p84 d11 tm9iob led5 p85 d12 tm10ioa led6 p86 d13 tm10iob led7 p87 d14 tm11ioa ocd ocd_sda p10 tm0io an14 clock input pin for on-chip debug function. ocs_scl p11 tm1io an15 data i/o pin for on-chip debug function. * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e table:1.5.6 shows pin functions of 100 pin version. table:1.5.6 pin functions of 100 pin version pin other function description power supply / ground * vdd50 on-chip regulator power supply power supply for i/o avdd power supply for analog operation. vout18 power supply for internal circuit. vrefh reference power supply pin for the a/d converter. avss ground pin for analog. vss ground function control * atrst auto reset setting pin nocdmod on-chip debug function (ocd) control pin reset nrst reset signal input pin (active low) clock osci p45 high-speed oscillation input pin (clkosc) (4 to 20 mhz) osco p44 high-speed oscillation output pin xi p46 low-speed oscillation input pin (clkx = 32.768 khz) xo p47 low-speed oscillation output pin sysclk p77 tmmio system clock signal output pin bus a20 p25 irq5a address output pins at memory expansion mode a19 p30 sbo1a a18 p31 sbi1a a17 p32 sbt1a a16 p33 sbo3a sda1a a15 p34 sbi3a tm4io a14 p35 sbt3a scl11a a13 p50 a12 p51 sbo9 a11 p52 sbi9 a10 p53 sbt9 a9 p54 sbo10 a8 p55 sbi10 a7 p56 sbt10 a6 p57 irq8 a5 p60 key0 tm13ioa a4 p61 key1 tm13iob a3 p62 key2 tm14ioa a2 p63 key3 tm14iob a1 p64 key4 tm15ioa a0 p65 key5 tm15iob refer to [chapter overview] of lsi user?s manual for detail about note of vdd and function contro l pins. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e bus d15 p40 sbi4a tm11iob data i/o pins at memory expansion mode d14 p87 led7 tm11ioa d13 p86 led6 tm10iob d12 p85 led5 tm10ioa d11 p84 led4 tm9iob d10 p83 led3 tm9ioa d9 p82 led2 tm8iob d8 p81 led1 tm8ioa d7 p75 tmmod5 d6 p74 tmmod4 d5 p73 tmmod3 d4 p72 tmmod2 d3 p71 tmmod1 d2 p70 tmmod0 d1 p67 key7 tm16iob d0 p66 key6 tm16ioa ncs2 p22 irq2a chip select signal output pins (active low) ncs1 p21 irq1a nre p16 sbt0a read enable signal output pin (active low) nwe1 p15 sbi0a linrxda write enable signal output pins (active low) nwe0 p14 sbo0a lintxda ndk p20 irq0a acknowledge signal input pin (active low) watchdog timer 2 nwdovf2 p13 irq5b tm20iob watchdog timer 2 over flow (active low) interrupt nmirq p42 irq7 sbt4a scl2a non-maskable interrupt request signal input pin (active low) irq8 p57 a6 external interrupt request signal input pin 8 irq7 p42 nmirq sbt4a scl2a external interrupt request signal input pin 7 irq6 p41 sbo4a sda2a external interrupt request signal input pin 6 irq5a p25 a20 external interrupt request signal input pin 5 (pin change is possible) irq5b p13 tm20iob nwdovf2 irq4a p24 external interrupt request signal input pin 4 (pin change is possible) irq4b pd7 tm12iob irq3a p23 external interrupt request signal input pin 3 (pin change is possible) irq3b pd6 tm12ioa irq2a p22 ncs2 external interrupt request signal input pin 2 (pin change is possible) irq2b pd5 irq1a p21 ncs1 external interrupt request signal input pin 1 (pin change is possible) irq1b pd4 (irx1a)** irq0a p20 ndk external interrupt request signal input pin 0 (pin change is possible) irq0b pd3 (itx1a)** key7 p67 d1 tm16iob key input interrupt key6 p66 d0 tm16ioa key5 p65 a0 tm15iob key4 p64 a1 tm15ioa key3 p63 a2 tm14iob key2 p62 a3 tm14ioa key1 p61 a4 tm13iob key0 p60 a5 tm13ioa timer tm0io p10 ocd_sda an14 8-bit timer 0 to 4 i/o pins tm1io p11 ocd_scl an15 tm2io p12 tm22iob tm3io p80 led0 tm4io p34 a15 sbi3a tm7ioa p00 sbo1b sbo6a an8 16-bit timer 7 i/o pin a, output pin b, c tm7ob p01 sbi1b sbi6a an9 daout1a tm7oc p02 sbt1b sbt6a an10 * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e timer tm8ioa p81 d8 led1 16-bit timer 8 to 16 i/o pins a, b tm8iob p82 d9 led2 tm9ioa p83 d10 led3 tm9iob p84 d11 led4 tm10ioa p85 d12 led5 tm10iob p86 d13 led6 tm11ioa p87 d14 led7 tm11iob p40 d15 sbi4a tm12ioa pd6 irq3b tm12iob pd7 irq4b tm13ioa p60 key0 a5 tm13iob p61 key1 a4 tm14ioa p62 key2 a3 tm14iob p63 key3 a2 tm15ioa p64 key4 a1 tm15iob p65 key5 a0 tm16ioa p66 key6 d0 tm16iob p67 key7 d1 tm20ioa pa7 an7 8-bit timer 20 to 22 i/o pins (pin change is possible) tm20iob p13 irq5b nwdovf2 tm21ioa pa6 an6 tm22ioa pa3 an3 daout0b tm22iob p12 tm2io tm21bka pa4 an4 8-bit timer 21 i/o pins (pin change is possible) tm21gcpa pa5 an5 daout0c tmmod0 p70 d2 motor control 16-bit timer i/o pins tmmod1 p71 d3 tmmod2 p72 d4 tmmod3 p73 d5 tmmod4 p74 d6 tmmod5 p75 d7 tmmio p77 sysclk serial sbt0a p16 nre serial clock i/o pins (pin change is possible) - clock synchronous/uart sbt0b p92 sbt1a p32 a17 sbt1b p02 sbt6a tm7oc an10 sbt2a p05 sbt5a scl0a an13 daout1c sbt2b pd2 sbt8a scl0b sbt3a p35 a14 scl1a sbt3b p95 scl1b (irx0a)** sbt4a p42 scl2a irq7 nmirq sbt5a p05 sbt2a scl0a an13 daout1c sbt6a p02 sbt1b tm7oc an10 sbt7a pa2 an2 sbt8a pd2 sbt2b scl0b sbt9 p53 sbt10 p56 * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e serial sbo0a p14 nwe0 lintxda serial data output pins (pin change is possible) - clock synchronous/uart sbo0b p90 (ctx0a)* lintxdb sbo1a p30 a19 sbo1b p00 sbo6a tm7ioa an8 sbo2a p03 sbo5a sda0a an11 daout1b sbo2b pd0 sbo8a sda0b sbo3a p33 a16 sda1a sbo3b p93 sda1b sbo4a p41 sda2a irq6 sbo5a p03 sbo2a sda0a an11 daout1b sbo6a p00 sbo1b tm7ioa an8 sbo7a pa0 an0 sbo8a pd0 sbo2b sda0b sbo9 p51 a12 sbo10 p54 a9 sbi0a p15 nwe1 linrxda serial data input pins (pin change is possible) - clock synchronous/uart sbi0b p91 (crx0a)* linrxdb sbi1a p31 a18 sbi1b p01 sbi6a tm7ob an9 daout1a sbi2a p04 sbi5a an12 sbi2b pd1 sbi8a sbi3a p34 a15 tm4io sbi3b p94 (itx0a)** sbi4a p40 d15 tm11iob sbi5a p04 sbi2a an12 sbi6a p01 sbi1b tm7ob an9 daout1a sbi7a pa1 an1 daout0a sbi8a pd1 sbi2b sbi9 p52 a11 sbi10 p55 a8 iic scl0a p05 sbt2a sbt5a an13 daout1c iic clock i/o pins scl0b pd2 sbt2b sbt8a scl1a p35 a14 sbt3a scl1b p95 sbt3b (irx0a)** scl2a p42 sbt4a irq7 nmirq sda0a p03 sbo2a sbo5a an11 daout1b iic data i/o pins sda0b pd0 sbo2b sbo8a sda1a p33 a16 sbo3a sda1b p93 sbo3b sda2a p41 sbo4a irq6 lin lintxda p14 sbo0a nwe0 lin data transmission pin (pin change is possible) lintxdb p90 sbo0b (ctx0a) * linrxda p15 sbi0a nwe1 lin data recept ion pin (pin change is possible) linrxdb p91 sbi0b (crx0a) * can * ctx0a p90 sbo0b lintxdb can data transmission pin (pin change is possible) crx0a p91 sbi0b linrxdb can data reception pin (pin change is possible) iebus ** itx0a p94 sbi3b iebus data transmission pin (pin change is possible) itx1a pd3 irq0b irx0a p95 sbt3b scl1b iebus data reception pin (pin change is possible) irx1a pd4 irq1b irx1a * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e a/d converter an0 pa0 sbo7a analog input pins an1 pa1 sbi7a daout0a an2 pa2 sbt7a an3 pa3 tm22ioa daout0b an4 pa4 tm21bka an5 pa5 tm21gcpa daout0c an6 pa6 tm21ioa an7 pa7 tm20ioa an8 p00 sbo1b tm7ioa sbo6a an9 p01 sbi1b tm7ob sbi6a daout1a an10 p02 sbt1b tm7oc sbt6a an11 p03 sbo2a sbo5a sda0a daout1b an12 p04 sbi2a sbi5a an13 p05 sbt2a sbt5a scl0a daout1c an14 p10 tm0io ocd_sda an15 p11 tm1io ocd_scl d/a converter daout0a pa1 sbi7a an1 analog output pins daout0b pa3 tm22ioa an3 daout0c pa5 tm21gcpa an5 daout1a p01 sbi1b tm7ob sbi6a an9 daout1b p03 sbo2a sbo5a sda0a an11 daout1c p05 sbt2a sbt5a scl0a an13 i/o port p00 sbo1b tm7ioa sbo6a an8 general purpose i/o port 0 p01 sbi1b tm7ob sbi6a an9 daout1a p02 sbt1b tm7oc sbt6a an10 p03 sbo2a sbo5a sda0a an11 daout1b p04 sbi2a sbi5a an12 p05 sbt2a sbt5a scl0a an13 daout1c p06 p10 ocd_sda tm0io an14 general purpose i/o port 1 p11 ocd_scl tm1io an15 p12 tm2io tm22iob p13 irq5b tm20iob nwdovf2 p14 nwe0 sbo0a lintxda p15 nwe1 sbi0a linrxda p16 nre sbt0a p20 ndk irq0a general purpose i/o port 2 p21 ncs1 irq1a p22 ncs2 irq2a p23 irq3a p24 irq4a p25 a20 irq5a p30 a19 sbo1a general purpose i/o port 3 p31 a18 sbi1a p32 a17 sbt1a p33 a16 sbo3a sda1a p34 a15 sbi3a tm4io p35 a14 sbt3a scl1a p40 d15 sbi4a tm11iob general purpose i/o port 4 p41 sbo4a sda2a irq6 p42 sbt4a scl2a irq7 nmirq p43 p44 osco p45 osci p46 xi p47 xo * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e i/o port p50 a13 general purpose i/o port 5 p51 a12 sbo9 p52 a11 sbi9 p53 a10 sbt9 p54 a9 sbo10 p55 a8 sbi10 p56 a7 sbt10 p57 a6 irq8 p60 a5 key0 tm13ioa general purpose i/o port 6 p61 a4 key1 tm13iob p62 a3 key2 tm14ioa p63 a2 key3 tm14iob p64 a1 key4 tm15ioa p65 a0 key5 tm15iob p66 d0 key6 tm16ioa p67 d1 key7 tm16iob p70 d2 tmmod0 general purpose i/o port 7 p71 d3 tmmod1 p72 d4 tmmod2 p73 d5 tmmod3 p74 d6 tmmod4 p75 d7 tmmod5 p77 sysclk tmmio p80 tm3io led0 general purpose i/o port 8 p81 d8 tm8ioa led1 p82 d9 tm8iob led2 p83 d10 tm9ioa led3 p84 d11 tm9iob led4 p85 d12 tm10ioa led5 p86 d13 tm10iob led6 p87 d14 tm11ioa led7 p90 sbo0b (ctx0a)* lintxdb general purpose i/o port 9 p91 sbi0b (crx0a)* linrxdb p92 sbt0b p93 sbo3b sda1b p94 sbi3b (itx0a)** p95 sbt3b scl1b (irx0a)** pa0 sbo7a an0 general purpose i/o port a pa1 sbi7a an1 daout0a pa2 sbt7a an2 pa3 tm22ioa an3 daout0b pa4 tm21bka an4 pa5 tm21gcpa an5 daout0c pa6 tm21ioa an6 pa7 tm20ioa an7 pd0 sbo2b sbo8a sda0b general purpose i/o port d pd1 sbi2b sbi8a pd2 sbt2b sbt8a scl0b pd3 (itx1a)** irq0b pd4 (irx1a)** irq1b pd5 irq2b pd6 tm12ioa irq3b pd7 tm12iob irq4b * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e led led0 p80 tm3io led drive pins led1 p81 d8 tm8ioa led2 p82 d9 tm8iob led3 p83 d10 tm9ioa led4 p84 d11 tm9iob led5 p85 d12 tm10ioa led6 p86 d13 tm10iob led7 p87 d14 tm11ioa ocd ocd_sda p10 tm0io an14 clock input pin for on-chip debug function. ocs_scl p11 tm1io an15 data i/o pin for on-chip debug function. * can-embedded series only. ** iebus-embedded series only. pin other function description downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.6 electrical characteristics this lsi manual describes a standard sp ecification (represent ative : mn103lf09r). when using this lsi, consult our sales offices for the product specifications. structure cmos integrated circuit application general purpose function cmos 32-bit, single chip microcomputer connection refer to [ figure:1.5.1 ] downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.6.1 absolute maximum ratings a. absolute maximum ratings *1 *2 *3 *4 v ss = 0.0 v parameter symbol rating unit a1 power supply voltage 1 *5 v dd50a -0.3 to +7.0 v a2 power supply voltage 2 *5 av dda -0.3 to +7.0 a3 input pin voltage v i -0.3 to v dd50 + 0.3 (upper limit:7.0) v a4 i/o pin voltage (other than p91, pe1) v io1 -0.3 to v dd50 + 0.3 (upper limit:7.0) a5 i/o pin voltage (p91, pe1) v io2 -0.3 to +7.0 a6 average output current *1 p80 to p87 i ol1 +22.5 ma other than p80 to p87 i ol2 +7.5 all i/o pin i oh -7.5 a7 power dissipation *6 t opr = 85 ? cp d1 400 mw a8 t opr = 105 ? cp d2 300 a9 operating ambient temperature t opr -40 to +105 ? c a10 storage temperature t stg -50 to +125 *1 applied to any 100 ms period. *2 connect at least one bypass capacitor of 0.1 ? f or larger between each power supply pin (vdd50, avdd) and gnd near the lsi for preventing latch-up. *3 connect appropriate capacitor of 1 ? f to 4 ? f between vout18 pin and gnd for the internal power voltage stabilization near the lsi. also, connect one or more capacitors of 1 ? f or large between vdd50 pin and vss. *4 the absolute maximum ratings are the limit values beyond which the lsi may be damaged lsi operation is not guaranteed. *5 using v dd50 = av dd *6 calculated using a 4-layer printed circuit board (75 mm ? 75 mm ? 0.8 mm). downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.6.2 operating conditions b. operating conditions v ss = 0 v ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max power supply voltage *7 b1 power supply voltage (vdd50) v dd50 2.2 3.3 5.5 v b2 power supply voltage(avdd) av dd v dd50 b3 reference power supply pin for the a/d converter (vrefh) v refh v dd50 b4 ram retention power supply voltage (vdd50) v dd50_s in stop mode 1.8 3.3 5.5 operating speed b5 instruction execution time t c1 v dd50 = 2.2 v to 5.5 v normal mode, clkcpu 40 mhz 25 ns t c2 v dd50 = 2.2 v to 5.5v slow mode, clkcpu 32.768 khz 30.5 ? s oscillation pin b6 oscillation frequency f osc v dd50 = 2.2 v to 5.5v 42 0 m h z b7 fx v dd50 = 2.2 v to 5.5v 32.768 khz b8 external capacitor *8 c 11 20 pf b9 c 12 20 b10 c 21 47 b11 c 22 47 b12 internal feedback resistor r f1 1.22 m ? b13 r f2 6.78 *7 v refh = av dd = v dd50 *8 connect extarnal capacitors suited for the used oscillator. for external capacity value, consult the oscillator manufacturer and perfrom matching tests enou gh for determining appropriate value. figure:1.6.1 o scillation circuit 1 figure:1.6. 2 oscillation circuit 2 osci osco r f1 c 11 c 12 oscillator internal feed b ack resistor xi xo r f2 internal feed b ack resistor c 21 c 22 oscillator downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max external clock input osci (osco is unconnected) b14 clock frequency f osc v dd50 = 2.2 v to 5.5 v 42 0 m h z b15 high-level pulse width *9 t wh1 figure:1.6.3 20 ns b16 low-level pulse width *9 t wl1 20 b17 rising time *10 t wr1 figure:1.6.3 2.5 b18 falling time *10 t wf1 2.5 external clock input xi (xo is unconnected) b19 clock frequency f x v dd50 = 2.2 v to 5.5v 32.768 khz b20 high-level pulse width *9 t wh2 figure:1.6.4 5 ? s b21 low-level pulse width *9 t wl2 5 b22 rising time *10 t wr2 figure:1.6.4 0.5 b23 falling time *10 t wf2 0.5 *9 the clock duty ratio should be 45% to 55% *10 rising time and falling time differ depending on the oscillation frequency. the max value is not a specified value but a rough value. consult the oscillator manufacturer and perform matching tests enough for determining appro priate value. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e figure:1.6.3 osci timing chart figure:1.6.4 xi timing chart t wh1 t wl1 0.9 v dd50 t wf1 t c1 t wr1 0.1 v dd50 t wh2 t wl2 0.9 v dd1 8 t wf2 t c2 t wr2 0.1 v dd1 8 v dd1 8 : 1. 8 v downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e c. dc characteristics v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max power supply current *11 c1 power supply current in normal mode i dd1 clkcpu = 20 mhz, v dd50 = 3.3 v [f osc = 20 mhz, pll off, f rc off] 13 26 ma c2 i dd2 clkcpu = 40 mhz, v dd50 = 3.3 v [f osc = 10 mhz, pll multiple by 8, f rc off] 24 48 c3 i dd3 clkcpu = 40 mhz, v dd50 = 3.3 v [f x = 32.768 khz, pll multiple by 2440, f rc off, f osc off] 23 46 c4 power supply current in slow mode i dd4 clkcpu = 32.768 khz, v dd50 = 3.3 v [f x = 32.768 khz, pll off, f rc off, f osc off, main regulator off] (at used the low-power cache) 15 130 ? a c5 power supply current in halt mode i dd5 clkcpu = 20 mhz, v dd50 = 3.3 v [f osc = 20 mhz, pll off, f rc off, f rcx off] 36m a c6 i dd6 clkcpu = 32 khz, v dd50 = 3.3 v [f osc = 4 mhz, pll off, f rc off, f rcx off, main regulator off] 300 500 ? a c7 i dd7 clkcpu = 32.768 khz, v dd50 = 3.3 v [f x = 32.768 khz, pll off, f rc off, f rcx off, f osc off, main regulator off] 51 1 0 c8 power supply current in stop mode i dd8 v dd50 = 3.3 v f osc off f x off f rc off f rcx off main regurator off ta = 25 ? c2 i dd9 ta = 85 ? c1 0 0 *11 i/o pin are all output setting (unloaded condition) downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max input pin 1 nocdmod, atrst c9 input voltage high-level v ih1 - 0.7v dd50 v dd50 v c10 input voltage low-level v il1 -0 0.3v dd50 c11 input leakage current i lk1 v in = v ss or v dd50 5 ? a input pin 2 nrst c12 input voltage high-level v ih2 - 0.7v dd50 v dd50 v c13 input voltage low-level v il2 -0 0.3v dd50 c14 internal pull-up resistance r pu2 v dd50 = 3.3 v, v in = 0 v 15 30 60 k ? i/o pin 1 p00 to p07, p10 to p16, p20 to p25, p30 to p35, p40 to p47, p50 to p57, p6 0 to p67, p70 to p77, p90, p92 to p97, pa0 to pa7, pb0 to pb7, pc0 to pc6, pd0 to pd7, pe0, pe2 to pe7, pf0 to pf6, pg0 to pg6, ph0 to ph1 c15 input voltage high-level v ih3 - 0.7v dd50 v dd50 v c16 input voltage low-level v il3 -0 0.3v dd50 c17 input leakage current i lk3 v in = v ss or v dd50 5 ? a c18 internal pull-up resistance r pu3 v dd50 = 3.3 v, v in = 0 v 15 30 60 k ? c19 output voltage high-level v oh3 v dd50 = 3.3 v, i oh = -2.0 ma 2.7 v c20 output voltage low-level v ol3 v dd50 = 3.3 v, i ol = 2.0 ma 0.4 downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max i/o pin 2 p80 to p87 c21 input voltage high-level v ih5 - 0.7v dd50 v dd50 v c22 input voltage low-level v il5 -0 0.3v dd50 c23 input leakage current i lk5 v in = v ss or v dd50 5 ? a c24 internal pull-up resistance r pu5 v dd50 = 3.3 v, v in = 0 v 15 30 60 k ? c25 output voltage high-level v oh5 v dd50 = 3.3 v, i oh = -2.0 ma 2.7 v c26 output voltage low-level 1 v ol5 v dd50 = 3.3 v, i ol = 2.0 ma 0.4 c27 output voltage low-level 2 v ol5 v dd50 = 3.3 v, i ol = 8.0 ma (p8led = "1") 0.4 i/o pin 3 p91, pe1 c28 input voltage high-level v ih6 - 0.7v dd50 5.5 v c29 input voltage low-level v il6 -0 0.3v dd50 c30 input leakage current i lk6 v in = v ss or v dd50 5 ? a c31 output voltage high-level v oh6 v dd50 = 3.3 v, i oh = -2.0 ma 2.7 v c32 output voltage low-level v ol6 v dd50 = 3.3 v, i ol = 2.0 ma 0.4 downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e d.a/d converter characteristics *12 v dd50 = av dd = 2.7 v to 5.5 v, v refh = 2.7 v to av dd v ss = 0 v ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max d1 a/d converter operation power supply voltage v dd50 = av dd 2.7 5.5 v d2 resolution 10 bit d3 non-linearity error nle av dd = v refh vss = 0 v 3 lsb d4 differential linearity error dnle 3 d5 zero transition voltage 20 100 mv d6 full-scale transition voltage av dd - 100 av dd -20 d7 a/d conversion time av dd = 5.0 v t ad = 200 ns , clkbus = 20 mhz 3.325 ? s d8 av dd = 3.3 v t ad = 800 ns , clkbus = 20 mhz 12.925 d9 t ad = 15.26 ? s , clkbus = 20 mhz 244.31 d10 sampling time t s1 t ad = 200 ns 0.4 3.6 d11 t s2 t ad = 15.26 ? s 30.52 274.68 d12 analog input voltage v adin vss v refh v d13 analog input leakage current av dd = v refh , v ss = 0 v at channel off: v adin = 0 v to av dd 5 ? a d14 reference voltage pin input leakage current av dd = v refh , v ss = 0 v at channel off: v adin = 0 v to av dd 5 d15 ladder resistance r ladd v dd50 = v refh , vss = 0 v 8.5 10.5 12.5 k ? *12 using av dd ? v refh the values of d3 to d6 and d10 to d15 are guaranteed on the condition of av dd = v refh = 3.3 v and v ss = 0 v or av dd = v refh = 5.0 v and v ss = 0 v. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e e.d/a converter characteristics *13 v dd50 = av dd = 2.7 v to 5.5 v, v refh = 2.7 v to av dd v ss = 0 v ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max e1 d/a converter operation power supply voltage v dd50 = av dd 2.7 5.5 v e2 resolution 10 bit e3 reference voltage low- level v refl_da v ss v e4 reference voltage high- level v refh_da av dd e5 non-linearity error nle 3 lsb e6 differential non-linearity error dnle 3 e7 zero-scale output voltage v zs d9 to d0 = all low-level 0 20 mv e8 full-scale output voltage v fs d9 to d0 = all high-level av dd -40 av dd e9 minimum refe rence resis- tance r ref 28 40 52 k ? e10 settling time t set external capacitor c l = 15 pf 8 ? s *13 the values of e2 to e10 are guaranteed on the condition of v dd50 = av dd = 3.3 v and v ss = 0 v or v dd50 = av dd = 5.0 v and v ss = 0 v. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.6.3 ac characteristics f. ac characteristics the parameter used for the ac characteristic is integer. the range can be set and the setting condition are as fol- low. refer to [chapter bus cont roller] of lsi user?s manual for setting method of each parameter. parameter at reset releasing settable range setting condition min max bcs 3 1 3 - ea 15 0 15 - bce 31 2 31 block 1,2 set to bce > ren ? ea and bce > wen ? ea. at ea=0, set to bcn > ren. ren 31 1 31 block 1,2 set to [ren ? ea]. wen 31 1 31 block 1,2 set to [wen ? ea]. dw 3 1 3 at ea = 0, set to dw > 1. at ea ? 0, set to dw > 0. downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e figure:1.6.5 external clock timing v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v, c l = 50 pf ta = -40 ? c to +105 ? c parameter symbol conditions rating unit min typ max clock timing. refer to figure:1.6.5. f1 system clock output cycle time t cyc 100 ns f2 system clock output high-level pulse width t ch f3 system clock output low-level pulse width t cl t cyc 2 -15 t cyc 2 -15 t ch t cl t cyc sysclk downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e figure:1.6.6 power-on sequence and reset pulse width v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v, c l = 50 pf ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max reset timing/power-on sequence. refer to figure:1.6.6 f4 reset release timing (nrst) t rsts 400 ? s f5 reset pulse width (nrst) t rstw 400 ns f6 mode setup timing (nocdmod) t mods 100 - po w er-on sequence - reset pulse w idth nrst t rstw t mods nocdmod nrst v refh av dd v dd50 t rsts downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v, c l = 50 pf ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max address/data separate mode. refer to figure:1.6.7, figure:1.6.8. *16 f7 address delay time (a[20:0]) t ad ns f8 address hold time (a[20:0]) t ah at reading at writing f9 chip select signal falling delay time (ncs[2:1]) t csdf f10 chip select signal rising delay time (ncs[2:1]) t csdr at reading at writing f11 read data setup time (d[15:0]) t rds 60 f12 read data hold time (d[15:0]) t rdh 0 f13 write data setup time (d[15:0]) t wds f14 write data hold time (d[15:0]) t wdh f15 data acknowledge signal setup time (ndk) t dks 50 f16 data acknowledge signal hold time (ndk) t dkh 0 f17 read enable signal falling delay time (nre) t redf t cyc n fr x ea-10 t cyc n fr x (bce-re n )-10 t cyc n fr x (bce- w e n )-10 t cyc n fr x ea-10 t cyc n fr x (bce-re n )-10 t cyc n fr x (bce- w e n )-10 t cyc n fr x ( w e n -ea)-1 5 t cyc n fr x (bce- w e n )-1 5 t cyc n fr x (bcs+ea)-10 downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e *16 the values of f7 to f20 are guaranteed on the condition of v dd50 = 3.3 v and v ss = 0 v. figure:1.6.7 separate address/data synchronous mode read timing f18 read enable signal pulse width (nre) t rew at fixed wait ns t hrew at handshake f19 write enable signal falling delay time (nwe[1:0]) t wedf f20 write enable signal pulse width (nwe[1:0]) t wew at fixed wait t hwew at handshake v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v, c l = 50 pf ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max address/data separate mode. refer to figure:1.6.7, figure:1.6.8. *16 t cyc n fr x (re n -ea)-10 t cyc n fr x (re n +1)-10 t cyc n fr x (bcs+ea)-10 t cyc n fr x ( w e n -ea)-1 0 t cyc n fr x ( w e n +1)-10 t dkh t dks t rds t rdh t redf t hre w sysclk n re a[20:0] n cs[2:1] d[15:0] t ad t ah t csdr t csdf t re w n dk downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e figure:1.6.8 se parate address/data synchronous mode write timing t dkh t dks t w ds t w dh t csdr t csdf t w edf t h w e w t ad t ah sysclk nw e[1:0] a[20:0] n cs[2:1] d[15:0] n dk t w e w downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e *17 the above-mentioned is standard without noise filter. when the noise filter is used, the minimum pulse width is determined with the sampling clock. figure:1.6.9 interrup t signal input timing v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v, c l = 50 pf ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max interrupt signal input timing refer to figure:1.6.9 *17 f21 non-maskable interrupt signal pulse width (nmirq) t nmiw ns f22 interrupt signal pulse width (irqn) t irqw t cyc n fr x 3 t cyc n fr x 3 irqn t irq w n mirq t n mi w downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v, c l = 50 pf ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max iic signal i/o timing 1 (scl clock frequency : max 100 khz) refer to figure:1.6.10. f23 bus free time (sda0-2) t buf 4.7 ? s f24 hold time of start condition (scl0-2) t hd;sta 4.0 f25 clock low-level pulse width (scl0-2) t low 4.7 f26 clock high-level pulse width (scl0-2) t high 4.0 f27 setup time of repeat start condition t su;sta 4.7 f28 hold time of data (sda0-2) t hd;dat at sda output 300 ns at sda input 0 f29 setup time of data (sda0-2) t su;dat 250 f30 setup time of stop condition t su;sto 4.0 ? s iic signal i/o timing 2 (scl clock frequency : max 400 khz) refer to figure:1.6.10. f31 bus free time (sda0-2) t buf 1.3 ? s f32 hold time of start condition (scl0-2) t hd;sta 0.6 f33 clock low-level pulse width (scl0-2) t low 1.3 f34 clock high-level pulse width (scl0-2) t high 0.6 f35 setup time of repeat start condition t su;sta 0.6 f36 hold time of data (sda0-2) t hd;dat at sda output 300 ns at sda input 0 f37 setup time of data (sda0-2) t su;dat 100 f38 setup time of stop condition t su;sto 0.6 ? s downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e figure:1.6.10 iic signal timing sda scl t buf t hd;sta sda scl t su;sta t hd;sta t su;st0 t lo w t high t hd;dat t su;dat downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v, c l = 50 pf ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max serial interface 0 to 10, at clock synchronous, i/o timing 1 (at master (sbt polarity ?h?)), refer to figu re:1.6.11 f39 cycle time f s_cycle1 300 ns f40 sbt high width t s_high1 (t s_cycle1 /2)-17 f41 sbt low width t s_low1 (t s_cycle1 /2)-17 f42 sbi/sbo setup time t s_set1 11 f43 sbi/sbo hold time t s_hold1 11 f44 sbo output delay t s_opd1 86 serial interface 0 to 10, at clock synchronous, i/o timing 2 (at slave (sbt polarity ?h?)), refe r to figure:1.6.11 f45 cycle time f s_cycle1 300 ns f46 sbt high width t s_high1 133 f47 sbt low width t s_low1 133 f48 sbi/sbo setup time t s_set1 11 f49 sbi/sbo hold time t s_hold1 11 f50 sbo output delay t s_opd1 86 downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v, c l = 50 pf ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max serial interface 0 to 4, 9, 10, at clock synchronous, i/o timing 3 (at master (sbt polarity ?l?) ), refer to figure:1.6.12 f51 cycle time f s_cycle2 300 ns f52 sbt high width t s_high2 (t s_cycle2 /2)-17 f53 sbt low width t s_low2 (t s_cycle2 /2)-17 f54 sbi/sbo setup time t s_set2 11 f55 sbi/sbo hold time t s_hold2 11 f56 sbo output delay t s_opd2 86 serial interface 0 to 4, 9, 10, at clock synchronous, i/o timing 4 (at slave (sbt polarity ?l?)), refer to figure:1.6.12 f57 cycle time f s_cycle2 300 ns f58 sbt high width t s_high2 133 f59 sbt low width t s_low2 133 f60 sbi/sbo setup time t s_set2 11 f61 sbi/sbo hold time t s_hold2 11 f62 sbo output delay t s_opd2 86 downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e figure:1.6.11 sif signal timing 1 figure:1.6.12 sif signal timing 2 ac measurement points : v ih = 0.7 ? v dd50 , v il = 0.3 ? v dd50 v oh = 0.7 ? v dd50 , v ol = 0.3 ? v dd50 t s_cycle1 t s_high1 t s_set1 t s_hold11 t s_opd1 *sbo inp u t f u nction has sif0 to 4, 9 and 10 only. t s_lo w 1 v ih v il v oh v ol sbt(inp u t/o u tp u t) sbi/sbo(inp u t)* sbo(o u tp u t) *sbo inp u t f u nction has sif0 to 4, 9 and 10 only. v ih v il v oh v ol sbt(inp u t/o u tp u t) sbi/sbo(inp u t)* sbo(o u tp u t) t s_cycle2 t s_high2 t s_set2 t s_hold2 t s_opd2 t s_lo w 2 downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v, c l = 50 pf ta = - 4 0 ? c to +105 ? c parameter symbol conditions rating unit min typ max serial interface 0 to 10 (uart) f63 maximum transfer rate f uart 500 kbps can f64 can system clock frequency f can 20 mhz f65 can bit rate bps 1 mbps iebus f66 iebus system clock frequency f ie communication mode : mode1, 2 20 mhz downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e g. internal flash memory e/w characteristics v ss = 0 v parameter symbol conditions rating unit min typ max g1 power supply voltage at e/w v dd50ew 2.7 5.5 v g2 ambient temperature at e/w t oprew -40 105 ? c g3 writing time t write per 64 bytes 1m s g4 blanking time large sector t erase1 per 1 sector 1 s g5 small sector t erase2 per 1 sector 0.5 downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e h. auto reset characteristics v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v ta = -40 ? c to +105 ? c parameter symbol conditions rating unit min typ max h1 operating power supply voltage v ddatrst auto reset on v rst v dd50 v h2 power supply voltage detection level 1 v rst1 at rasing 2.4 2.7 3.0 v h3 power supply voltage detection level 2 v rst2 at falling 2.25 2.4 2.55 h4 change rate of power supply voltage ? t/ ? v 2.0 ms/v downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e i. power supply voltage detection circuit characteristics v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v ta = -40 ? c to +105 ? c parameter symbol conditions rating unit min typ max i1 power supply voltage detection level 1 v lvi11 at rising 2.45 2.6 2.75 v i2 v lvi12 at falling 2.35 2.5 2.65 i3 power supply voltage detection level 2 v lvi21 at rising 2.6 2.8 3.0 i4 v lvi22 at falling 2.5 2.7 2.9 i5 power supply voltage detection level 3 v lvi31 at rising 2.8 3.0 3.2 i6 v lvi32 at falling 2.7 2.9 3.1 i7 power supply voltage detection level 4 v lvi41 at rising 3.0 3.2 3.4 i8 v lvi42 at falling 2.9 3.1 3.3 i9 power supply voltage detection level 5 v lvi51 at rising 3.2 3.4 3.6 i10 v lvi52 at falling 3.1 3.3 3.5 i11 power supply voltage detection level 6 v lvi61 at rising 3.4 3.6 3.8 i12 v lvi62 at falling 3.3 3.5 3.7 i13 power supply voltage detection level 7 v lvi71 at rising 3.6 3.8 4.0 i14 v lvi72 at falling 3.5 3.7 3.9 i15 power supply voltage detection level 8 v lvi81 at rising 3.8 4.0 4.2 i16 v lvi82 at falling 3.7 3.9 4.1 i17 minimum pulse width t w 15 ms i18 change rate of power supply voltage ? t/ ? v 2.0 ms/v downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e j. internal high-speed oscillation circuit characteristics v dd50 = av dd = v refh = 2.2 v to 5.5 v v ss = 0 v ta = -40 ? c to +105 ? c parameter symbol conditions rating unit min typ max j1 high-speed internal oscillation cir- cuit output frequency f rc 18 20 22 mhz j2 low-speed internal oscillation cir- cuit output frequency f rcx 27 30 33 khz downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e 1.7 package dimension ? package of 100 pin versionunit: mm figure:1.7.1 package dimension downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e ? package of 128 pin versionunit: mm figure:1.7.2 package dimension downloaded from: http:///
mn103lf09/10/11/12/13/14/15/16 /17/18/19/20/21/22/ 23/24/25/26/27/32/33/ 99/a0/a1/a2/a3/a4/ a5/a6/a7/a8/a9/b0/b1/b2/b3/b4/ b5/b6/b7/b8/b9/c0/c2/c3 series 32-bit single-chip microcontroller publication date: may 2016 pubno. 2340901-025e ? package of 144 pin versionunit: mm figure:1.7.3 package dimension downloaded from: http:///
request for your special attention and precautions in using the technical information and semiconductors described in this book (1) if any of the products or technical information described in this book is to be exported or provided to non-resident s, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) the technical information described in this book is intended only to sh ow the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual p roperty right or other right owned by panasonic corporation or any other c ompany. therefore, no responsibilit y is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information de-scribed in this book. (3) the products described in this book are intended to be used for general a pplications (such as office equipment, communications equipment, measuring instruments and household applian ces), or for specific applications as expressly stated in this book. please consult with our sales staff in advance for information on the follo wing applications, moreover please exchange documents separately on terms of use etc.: special applications (such as f or in-vehicle equipment, airplanes, aerospace, automotive equipment, traffic signal ing equipment, combustion equipme nt, medical equipment and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. unless exchanging documents on terms of use etc. in advance, it is to be unde rstood that our company shall not be held responsible for any damage incurred as a result of or in connection with you r using the products described in this book for any special application. (4) the products and product specific ations described in this book are sub ject to change without notice for modification and/or improvement. at the final stage of your design, purchasing, or use o f the products, therefore, ask for the most up- to-date product standards in advance t o make sure that the latest specifications satisfy your requirements. (5) when designing your equipment, comply with the range of absolute maxim um rating and the guaranteed operating conditions (operating power supply v oltage and operating environment et c.). especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power- on, power-off and mode-switching. other- wise, we will not be liable for any defect which may arise later in your equip ment. even when the products are used withi n the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. measures o n the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) comply with the instructions for use in order to prevent breakdown and characteristics change due to external fact ors (esd, eos, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. we do not guarantee quality for disassembled p roducts or the product re-mounte d after removing from the mounting board. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) when reselling products described in this book to other companies with out our permission and receiving any claim of request from the resale destination, please understand that customers wi ll bear the burden. (8) this book may be not reprinted or reproduced whether wholly or partiall y, without the prior written permission of our company. no.010618 downloaded from: http:///

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